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1
Abstraction techniques for verification of multiple tightly coupled counters, registers and comparators
November 2000
HLDVT '00: Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
Publisher: IEEE Computer Society
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We present new non-deterministic finite state machine (NFSM) abstraction techniques for comparators based on the comparison difference of the two operands (e.g., counters) instead of the comparison order. One of the major advantages of the comparison ...


Keywords: behavioral VHDL models, comparators, comparison difference abstractions, finite state machine, finite state machines, formal verification, hardware description languages, logic testing, semantic matching, semantic model abstraction
2
Batch ZK Proof and Verification of OR Logic
April 2009
Information Security and Cryptology
Publisher: Springer-Verlag
Additional Information:full citation, abstract
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When multiple knowledge statements linked with "OR" logic have to be proved and verified, the existing solution is the proof technique by Cramer et al, in which multiple proof and verification protocols are performed in parallel. It is pointed ...


Keywords: Batch proof and verification, knowledge statements linked with OR logic
3
Multilocus consensus genetic maps (MCGM): Formulation, algorithms, and results
D. I. Mester, Y. I. Ronin, M. A. Korostishevsky, V. L. Pikus, A. E. Glazman, A. B. Korol
February 2006
Computational Biology and Chemistry , Volume 30 Issue 1
Publisher: Elsevier Science Publishers B. V.
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In process of creating genetic maps different labs/research groups obtain overlapping parts of the map. Merging these parts into one integrative map is based on looking for maximum shared marker orders among the maps. Really, not all shared markers of ...


Keywords: Multilocus ordering, Re-sampling verification, Synchronized discrete optimization, TSP, Unstable neighborhoods
4
The Corrected Normalized Correlation Coefficient: A Novel Way of Matching Score Calculation for LDA-Based Face Verification
October 2008
FSKD '08: Proceedings of the 2008 Fifth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 04 , Volume 04
Publisher: IEEE Computer Society
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The paper presents a novel way of matching score calculation for LDA-based face verification. Different from the classical matching schemes, where the decision regarding the identity of the user currently presented to the face verification system is ...


Keywords: Corrected normalized correlation coefficient, matching score, face verification, XM2VTS database
5
Experience on knowledge-based software engineering: A logic-based requirements language and its industrial applications
Jeffrey J. P. Tsai, Alan Liu
October 2009
Journal of Systems and Software , Volume 82 Issue 10
Publisher: Elsevier Science Inc.
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A formal requirements specification language plays an important role in software development. Not only can such language be used for stating requirements specification, but also can be used in many phases of software development life cycle. The FRORL ...


Keywords: Automatic code generation, Formal specification language, Formal verification, Knowledge-based software engineering, Nonmonotonic logic
6
The Spicy system: towards a notion of mapping quality
June 2008
SIGMOD '08: Proceedings of the 2008 ACM SIGMOD international conference on Management of data
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We introduce the Spicy system, a novel approach to the problem of automatically selecting the best mappings among two data sources. Known schema mapping algorithms rely on value correspondences -- i.e. correspondences among semantically related attributes ...


Keywords: mapping verification, mappings, schema matching
7
Pseudo-outer product based fuzzy neural network fingerprint verification system
April 2001
Neural Networks , Volume 14 Issue 3
Publisher: Elsevier Science Ltd.
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Keywords: Fuzzy neural network, POPFNN, degraded samples, fingerprint verification, fuzzy rule identification, plain impression
8
Enhancement of multimodal biometric segregation using unconstrained cohort normalisation
March 2008
Pattern Recognition , Volume 41 Issue 3
Publisher: Elsevier Science Inc.
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This paper presents an investigation into the effects, on the accuracy of multimodal biometrics, of introducing unconstrained cohort normalisation (UCN) into the score-level fusion process. Whilst score normalisation has been widely used in voice biometrics, ...


Keywords: Biometric identification, Biometric verification, Multimodal biometrics, Score-level fusion, Unconstrained cohort normalisation
9
Stepwise Development of Process-Algebraic Specifications in Decorated Trace Semantics
May 2005
Formal Methods in System Design , Volume 26 Issue 3
Publisher: Kluwer Academic Publishers
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Process algebras are convenient formalisms to develop specifications stepwise. This can be done with the help of partially defined states in a specification. When refining the specification, new transitions are added to partially defined states. At every ...


Keywords: process algebra, refinement, specification, verification
10
A lightweight LTL runtime verification tool for java
October 2004
OOPSLA '04: Companion to the 19th annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications
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Runtime verification is a special form of runtime testing, employing formal methods and languages. In this work, we utilize next-time free linear-time temporal logic (LTL\textbackslash X) as formal framework. The discipline serves the purpose of asserting ...


Keywords: aspectJ, concurrent systems, joinpoints, linear-time temporal logic (LTL), metadata, runtime verification
11
A digital transient simulation strategy for integrated circuits
May 1991
A digital transient simulation strategy for integrated circuits
Publisher: Carnegie Mellon University
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Keywords: VLSI, timing, verification
12
Verification-Based Test Case Generation for Full Feasible Branch Coverage
November 2008
SEFM '08: Proceedings of the 2008 Sixth IEEE International Conference on Software Engineering and Formal Methods
Publisher: IEEE Computer Society
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The goal of this work is to improve the testing of programs that contain loops and complex methods. We achieve this goal with verification-based testing, which is a technique that can generate test cases not only from source code but also from loop invariants ...


Keywords: Specification-based Testing, Verification-based Testing, Branch Coverage, White-box Testing, Precondition, Dynamic Logic, Java
13
Proving non-termination
January 2008
POPL '08: Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Publisher: ACM Request Permissions Request Permissions   
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The search for proof and the search for counterexamples (bugs) are complementary activities that need to be pursued concurrently in order to maximize the practical success rate of verification tools.While this is well-understood in safety verification, ...


Keywords: model checking, non-termination, program verification, recurrent sets, testing

Also published in:
January 2008 SIGPLAN Notices Volume 43 Issue 1
14
A method for verifying liveness of protocols modeled as a class of ECFSM
June 1995
PSTV '94: Proceedings of the fourteenth of a series of annual meetings on Protocol specification, testing and verification XIV
Publisher: Chapman & Hall, Ltd.
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Keywords: network protocol, program verification
15
Modeling component connectors in Reo by constraint automata
July 2006
Science of Computer Programming , Volume 61 Issue 2
Publisher: Elsevier North-Holland, Inc.
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In this paper we introduce constraint automata and propose them as an operational model for Reo, an exogenous coordination language for compositional construction of component connectors based on a calculus of channels. By providing composition operators ...


Keywords: Reo, bisimulation, components, composition, constraint automata, coordination, simulation, timed data streams, verification
16
A really temporal logic
October 1989
SFCS '89: Proceedings of the 30th Annual Symposium on Foundations of Computer Science - Volume 00 , Volume 00
Publisher: IEEE Computer Society
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A real-time temporal logic for the specification of reactive systems is introduced. The novel feature of the logic, TPTL, is the adoption of temporal operators as quantifiers over time variables; every modality binds a variable to the time(s) it refers ...


Keywords: model-checking algorithm, really temporal logic, specification, reactive systems, TPTL, temporal operators, quantifiers, natural specification language, formalism, verification, synthesis, tableau-based decision procedure
17
Hardware simulation: a flexible approach to verification and performance evaluation of communication protocols
October 1995
ASILOMAR '95: Proceedings of the 29th Asilomar Conference on Signals, Systems and Computers (2-Volume Set)
Publisher: IEEE Computer Society
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Communication protocols can be modeled as finite state machines, a formalism commonly used in digital circuit design. Sophisticated and efficient simulation techniques have been developed to help integrated circuit designers. In this paper, we propose ...


Keywords: communication protocols, computer networks, digital circuit design, finite state machines, hardware simulation, integrated circuit design, performance evaluation, simulation techniques, verification
18
Content and emphasis in CS1
December 2005
SIGCSE Bulletin , Volume 37 Issue 4
Publisher: ACM
Full text available: PdfPdf (305.81 KB)
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In the spring of 2004, 351 faculty members responded to a survey concerning the content and topic emphasis in the first course in computing. The survey targeted two different groups of faculty, one SIGCSE members and the other faculty who had contacted ...


Keywords: CS1 content, CS1 emphasis, curricula, languages, methodologies, survey results, verification
19
Structural Error Verification in Active Rule-Based Systems using Petri Nets
November 2006
MICAI '06: Proceedings of the Fifth Mexican International Conference on Artificial Intelligence
Publisher: IEEE Computer Society
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A knowledge base needs to be verified so that it works corretly. Up to date, approaches on production rule base verification have been reported adequately. However, active rule base verification cannot be found. In this paper, we primitively define structural ...


Keywords: knowledge base, verification, active rules, Petri nets
20
Inference of Message Sequence Charts
July 2003
IEEE Transactions on Software Engineering , Volume 29 Issue 7
Publisher: IEEE Press
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Abstract¿Software designers draw Message Sequence Charts for early modeling of the individual behaviors they expect from the concurrent system under design. Can they be sure that precisely the behaviors they have described are realizable by some implementation ...


Keywords: Message sequence charts, requirements analysis, formal verification, scenarios, concurrent state machines, deadlock freedom, realizability, synthesis.
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