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Abstraction techniques for verification of multiple tightly coupled counters, registers and comparators
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November 2000
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HLDVT '00: Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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We present new non-deterministic finite state machine (NFSM) abstraction techniques for comparators based on the comparison difference of the two operands (e.g., counters) instead of the comparison order. One of the major advantages of the comparison ...
Keywords: behavioral VHDL models, comparators, comparison difference abstractions, finite state machine, finite state machines, formal verification, hardware description languages, logic testing, semantic matching, semantic model abstraction
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2
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Batch ZK Proof and Verification of OR Logic
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April 2009
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Information Security and Cryptology
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Publisher: Springer-Verlag
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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When multiple knowledge statements linked with "OR" logic have to be proved and verified, the existing solution is the proof technique by Cramer et al, in which multiple proof and verification protocols are performed in parallel. It is pointed ...
Keywords: Batch proof and verification, knowledge statements linked with OR logic
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3
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Multilocus consensus genetic maps (MCGM): Formulation, algorithms, and results
D. I. Mester,
Y. I. Ronin,
M. A. Korostishevsky,
V. L. Pikus,
A. E. Glazman,
A. B. Korol
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February 2006
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Computational Biology and Chemistry
, Volume 30 Issue 1
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Publisher: Elsevier Science Publishers B. V.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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In process of creating genetic maps different labs/research groups obtain overlapping parts of the map. Merging these parts into one integrative map is based on looking for maximum shared marker orders among the maps. Really, not all shared markers of ...
Keywords: Multilocus ordering, Re-sampling verification, Synchronized discrete optimization, TSP, Unstable neighborhoods
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4
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The Corrected Normalized Correlation Coefficient: A Novel Way of Matching Score Calculation for LDA-Based Face Verification
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October 2008
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FSKD '08: Proceedings of the 2008 Fifth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 04
, Volume 04
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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The paper presents a novel way of matching score calculation for LDA-based face verification. Different from the classical matching schemes, where the decision regarding the identity of the user currently presented to the face verification system is ...
Keywords: Corrected normalized correlation coefficient, matching score, face verification, XM2VTS database
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5
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Experience on knowledge-based software engineering: A logic-based requirements language and its industrial applications
Jeffrey J. P. Tsai,
Alan Liu
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October 2009
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Journal of Systems and Software
, Volume 82 Issue 10
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Publisher: Elsevier Science Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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A formal requirements specification language plays an important role in software development. Not only can such language be used for stating requirements specification, but also can be used in many phases of software development life cycle. The FRORL ...
Keywords: Automatic code generation, Formal specification language, Formal verification, Knowledge-based software engineering, Nonmonotonic logic
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6
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The Spicy system: towards a notion of mapping quality
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June 2008
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SIGMOD '08: Proceedings of the 2008 ACM SIGMOD international conference on Management of data
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Publisher: ACM
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Full text available: |
Pdf
(269.15 KB)
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| Bibliometrics: Downloads (6 Weeks): 9, Downloads (12 Months): 107, Downloads (Overall): 175, Citation Count: 1 |
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We introduce the Spicy system, a novel approach to the problem of automatically selecting the best mappings among two data sources. Known schema mapping algorithms rely on value correspondences -- i.e. correspondences among semantically related attributes ...
Keywords: mapping verification, mappings, schema matching
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7
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Pseudo-outer product based fuzzy neural network fingerprint verification system
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April 2001
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Neural Networks
, Volume 14 Issue 3
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Publisher: Elsevier Science Ltd.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 6 |
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Keywords: Fuzzy neural network, POPFNN, degraded samples, fingerprint verification, fuzzy rule identification, plain impression
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8
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Enhancement of multimodal biometric segregation using unconstrained cohort normalisation
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March 2008
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Pattern Recognition
, Volume 41 Issue 3
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Publisher: Elsevier Science Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 2 |
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This paper presents an investigation into the effects, on the accuracy of multimodal biometrics, of introducing unconstrained cohort normalisation (UCN) into the score-level fusion process. Whilst score normalisation has been widely used in voice biometrics, ...
Keywords: Biometric identification, Biometric verification, Multimodal biometrics, Score-level fusion, Unconstrained cohort normalisation
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9
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Stepwise Development of Process-Algebraic Specifications in Decorated Trace Semantics
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May 2005
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Formal Methods in System Design
, Volume 26 Issue 3
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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Process algebras are convenient formalisms to develop specifications stepwise. This can be done with the help of partially defined states in a specification. When refining the specification, new transitions are added to partially defined states. At every ...
Keywords: process algebra, refinement, specification, verification
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10
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A lightweight LTL runtime verification tool for java
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October 2004
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OOPSLA '04: Companion to the 19th annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications
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Publisher: ACM
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Full text available: |
Pdf
(51.21 KB)
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| Bibliometrics: Downloads (6 Weeks): 7, Downloads (12 Months): 54, Downloads (Overall): 288, Citation Count: 0 |
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Runtime verification is a special form of runtime testing, employing formal methods and languages. In this work, we utilize next-time free linear-time temporal logic (LTL\textbackslash X) as formal framework. The discipline serves the purpose of asserting ...
Keywords: aspectJ, concurrent systems, joinpoints, linear-time temporal logic (LTL), metadata, runtime verification
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11
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A digital transient simulation strategy for integrated circuits
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May 1991
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A digital transient simulation strategy for integrated circuits
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Publisher: Carnegie Mellon University
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 1 |
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Keywords: VLSI, timing, verification
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12
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Verification-Based Test Case Generation for Full Feasible Branch Coverage
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November 2008
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SEFM '08: Proceedings of the 2008 Sixth IEEE International Conference on Software Engineering and Formal Methods
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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The goal of this work is to improve the testing of programs that contain loops and complex methods. We achieve this goal with verification-based testing, which is a technique that can generate test cases not only from source code but also from loop invariants ...
Keywords: Specification-based Testing, Verification-based Testing, Branch Coverage, White-box Testing, Precondition, Dynamic Logic, Java
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13
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Proving non-termination
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January 2008
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POPL '08: Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
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Publisher: ACM
Request Permissions
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Full text available: |
Pdf
(271.53 KB)
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| Bibliometrics: Downloads (6 Weeks): 14, Downloads (12 Months): 131, Downloads (Overall): 320, Citation Count: 2 |
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The search for proof and the search for counterexamples (bugs) are complementary activities that need to be pursued concurrently in order to maximize the practical success rate of verification tools.While this is well-understood in safety verification, ...
Keywords: model checking, non-termination, program verification, recurrent sets, testing
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Also published in: |
| January 2008 |
SIGPLAN Notices |
Volume 43 Issue 1 |
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14
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A method for verifying liveness of protocols modeled as a class of ECFSM
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June 1995
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PSTV '94: Proceedings of the fourteenth of a series of annual meetings on Protocol specification, testing and verification XIV
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Publisher: Chapman & Hall, Ltd.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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Keywords: network protocol, program verification
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15
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Modeling component connectors in Reo by constraint automata
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July 2006
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Science of Computer Programming
, Volume 61 Issue 2
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Publisher: Elsevier North-Holland, Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 16 |
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In this paper we introduce constraint automata and propose them as an operational model for Reo, an exogenous coordination language for compositional construction of component connectors based on a calculus of channels. By providing composition operators ...
Keywords: Reo, bisimulation, components, composition, constraint automata, coordination, simulation, timed data streams, verification
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16
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A really temporal logic
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October 1989
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SFCS '89: Proceedings of the 30th Annual Symposium on Foundations of Computer Science - Volume 00
, Volume 00
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 5 |
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A real-time temporal logic for the specification of reactive systems is introduced. The novel feature of the logic, TPTL, is the adoption of temporal operators as quantifiers over time variables; every modality binds a variable to the time(s) it refers ...
Keywords: model-checking algorithm, really temporal logic, specification, reactive systems, TPTL, temporal operators, quantifiers, natural specification language, formalism, verification, synthesis, tableau-based decision procedure
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17
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Hardware simulation: a flexible approach to verification and performance evaluation of communication protocols
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October 1995
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ASILOMAR '95: Proceedings of the 29th Asilomar Conference on Signals, Systems and Computers (2-Volume Set)
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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Communication protocols can be modeled as finite state machines, a formalism commonly used in digital circuit design. Sophisticated and efficient simulation techniques have been developed to help integrated circuit designers. In this paper, we propose ...
Keywords: communication protocols, computer networks, digital circuit design, finite state machines, hardware simulation, integrated circuit design, performance evaluation, simulation techniques, verification
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18
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Content and emphasis in CS1
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December 2005
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SIGCSE Bulletin
, Volume 37 Issue 4
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Publisher: ACM
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Full text available: |
Pdf
(305.81 KB)
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| Bibliometrics: Downloads (6 Weeks): 6, Downloads (12 Months): 30, Downloads (Overall): 175, Citation Count: 3 |
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In the spring of 2004, 351 faculty members responded to a survey concerning the content and topic emphasis in the first course in computing. The survey targeted two different groups of faculty, one SIGCSE members and the other faculty who had contacted ...
Keywords: CS1 content, CS1 emphasis, curricula, languages, methodologies, survey results, verification
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19
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Structural Error Verification in Active Rule-Based Systems using Petri Nets
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November 2006
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MICAI '06: Proceedings of the Fifth Mexican International Conference on Artificial Intelligence
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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A knowledge base needs to be verified so that it works corretly. Up to date, approaches on production rule base verification have been reported adequately. However, active rule base verification cannot be found. In this paper, we primitively define structural ...
Keywords: knowledge base, verification, active rules, Petri nets
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20
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Inference of Message Sequence Charts
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July 2003
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IEEE Transactions on Software Engineering
, Volume 29 Issue 7
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Publisher: IEEE Press
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 1 |
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Abstract¿Software designers draw Message Sequence Charts for early modeling of the individual behaviors they expect from the concurrent system under design. Can they be sure that precisely the behaviors they have described are realizable by some implementation ...
Keywords: Message sequence charts, requirements analysis, formal verification, scenarios, concurrent state machines, deadlock freedom, realizability, synthesis.
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