System reliability aspects are receiving a lot of attention in the design of systems for critical application fields. Often these issues are approached at low abstraction levels, toward the end of the design process, introducing significant overheads. ...

There are many design challenges in the hardware-software co-design approach for performance improvement of data-intensive streaming applications with a general-purpose microprocessor and a hardware accelerator. These design challenges are mainly to ...

Main research in this paper is the DA(data acquisition) system design which based on the USB and MMC. According a USB's chip correlation hardware information, USB protocol, DA systematic structure and singlechip computer information, a hardware development ...

In this paper, we propose a flexible and high-reliable HW/SW co-design method for real-time systems consisting of multiple functional modules using general purpose components such as DSP, CPU and memory. In our method, we specify a system as a parallel ...

Mobile personal communications applications require high speed, light weight, low power and customisability. They also exhibit architectural heterogeneity of sub-systems. This paper describes a design methodology for such applications which spans the ...

The complexity of a System-on-Chip design is not only in the million transistors packed in a square millimeter. The major challenge for technical success of a SoC is to make sure that millions lines of software fit in with millions gates. In this paper, ...

In this survey, key drivers in design methodology are provided that enable successful design of systems-on-a-chip for the highly competitive telecommunications market. Main components of a design environment are described that fulfill the requirements ...

This article defines two-way coupled finite automata. Two-way coupled finite automaton enable to make a translation from input language to output language and from output language to input language too. There is discussed deterministic parsing by using ...

This paper proposes an efficient implementation of the H.264/AVC motion estimation algorithm in hardware and software. Furthermore, a complete co-design trajectory from the HW/SW partitioning to the actual implementation on two different targets ...

This paper introduces an enhanced hardware/software co-design framework allowing the designer to introduce hardware fault detection properties in the system under consideration. By considering reliability requirements at system level, within a hw/sw ...

Often reconfigurable systems are reported to have 10× to 100× speedup over that of a software system. However, the reconfigurable hardware must usually be combined with software to form an entire system. This system integration presents a hardware/software ...

In this paper, we present an efficient approach to profiling for HW/SW partitioning. The execution of arbitrary SW code regions is analyzed with a clock-cycle accuracy without introducing an additional profiling induced performance overhead. Based on ...

In this paper, we present a proposal for a UML profile called `Embedded UML'. Embedded UML represents a synthesis of various ideas in the real-time UML community, and concepts drawn from the Hardware-Software co-design field. Embedded UML first selects ...

This paper studies the use of a reconfigurable architecture platform for embedded control applications aimed at improving real time performance. The hw/sw codesign methodology from POLIS is used. It starts from high-level specifications, optimizes an ...

Partitioning is a very important task in hardware/software co-design. Generally the size of the edge cut-set is used to evaluate the communication cost. When communication between components is through buffered channels, the size of the edge cut-set ...

This paper presents a methodology for hardware/software co-design with particular emphasis on the problems related to the concurrent simulation and synthesis of hardware and software parts of the overall system. The proposed approach aims at overcoming ...

We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The starting point is a system model written in the synchronous language Esterel, ...

Many FPGAs are served as network devices today. The ability of networked reconfiguration of such devices can enable the control and upgrading of them from a long distance. Previous researches on networked reconfiguration focused on hardware implementation ...