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1
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A programmable multi-language generator for CoDesign
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February 1998
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DATE '98: Proceedings of the conference on Design, automation and test in Europe
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): 0, Downloads (12 Months): 3, Downloads (Overall): 66, Citation Count: 0 |
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This paper presents an innovative technique to efficiently develop hardware and software code generators. The specification model is first converted into its equivalent data structure. Target programs result from a set of transformation rules applied ...
Keywords: CoDesign, meta-generator, code generator
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2
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Automatic application-specific instruction-set extensions under microarchitectural constraints
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December 2003
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International Journal of Parallel Programming
, Volume 31 Issue 6
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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This paper presents a methodology for automatically designing Instruction-Set Extensions in embedded processors. Many commercially available CPUs now offer the possibility of extending their instruction set for a specific application. Their tool chains ...
Keywords: automatic partitioning, customisable processors, hardware/software codesign, instruction-set extensions
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3
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A memory-based architecture for MPEG2 system protocol LSI's
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September 1999
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
, Volume 7 Issue 3
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Publisher: IEEE Educational Activities Department
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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Keywords: HW/SW codesign, MPEG2 systems, VLSI, embedded system, memory-based architecture, multiplexor/demultiplexor, protocol processing
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4
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ASIP Approach for Implementation of H.264/AVC
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January 2008
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Journal of Signal Processing Systems
, Volume 50 Issue 1
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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This paper presents an Application Specific Instruction Set Processor (ASIP) for implementation of H.264/AVC, called Video Specific Instruction-set Processor (VSIP). The proposed VSIP has novel instructions and optimized hardware architectures for specific ...
Keywords: H.264/AVC, application specific instruction-set processor, data reuse, hardware accelerator, hardware software codesign, low power design
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5
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TTL: a modular language for hardware/software systems design
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March 2003
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Journal of Computer and System Sciences
, Volume 66 Issue 2
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Publisher: Academic Press, Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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The development of tools for the design of both hardware and software systems draws great benefits from the use of formal methods, especially if they offer a descriptive capacity which covers real applications. On the basis of the T-LOTOS language, a ...
Keywords: codesign, formal description techniques
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6
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A case study of hardware/software partitioning of traffic simulation on the Cray XD1
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January 2008
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
, Volume 16 Issue 1
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Publisher: IEEE Educational Activities Department
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 1 |
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Scientific application kernels mapped to reconfigurable hardware have been reported to have 10 × to 100 × speedup over equivalent software. These promising results suggest that reconfigurable logic might offer significant speedup on applications ...
Keywords: hardware/software codesign, simulation, system integration
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7
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Embedded system design
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November 1996
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Design Automation for Embedded Systems
, Volume 1 Issue 1-2
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 16 |
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Keywords: HW/SW codesign, automotive electronics, system design, video processing
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8
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Codesign of graphics hardware accelerators
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August 1997
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HWWS '97: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
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Publisher: ACM
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Full text available: |
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(832.92 KB)
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| Bibliometrics: Downloads (6 Weeks): 2, Downloads (12 Months): 31, Downloads (Overall): 365, Citation Count: 2 |
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Keywords: 3D graphics, C++, VHDL, codesign, component and design reuse, object oriented programming
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9
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GRAAL: A Framework for Low-Power 3D Graphics Accelerators
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July 2008
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IEEE Computer Graphics and Applications
, Volume 28 Issue 4
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Publisher: IEEE Computer Society Press
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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The GRAphics AcceLerator (GRAAL) design-exploration framework is an open system that offers a coherent development methodology for hardware/software cosimulation and codesign of embedded 3D graphics accelerators. GRAAL incorporates tools to help visually ...
Keywords: hardware/software codesign, 3D graphics architectures, tile-based rendering
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10
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Late Hardware/Software Partitioning by Using SystemC Functional Models
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May 2009
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AMS '09: Proceedings of the 2009 Third Asia International Conference on Modelling & Simulation - Volume 00
, Volume 00
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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In this paper a partly unified hardware/software design flow is presented. It uses SystemC as system level design language and postpones the partitioning decision to a lower abstraction level by using a realization independent functional model. Especially ...
Keywords: VoIP, Hardware/Software Codesign, FPGA, Signal Processing, High Level Synthesis, Partitioning, SystemC
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11
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Communication Interface Synthesis for Multilanguage Specifications
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June 1999
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RSP '99: Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 1 |
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Nowadays the design of complex systems requires the cooperation of several teams belonging to different cultures and using different languages. It is necessary to dispose of new design and verification methods to handle multilanguage approaches. This ...
Keywords: Multilanguage Codesign, Interface Synthesis
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12
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Perspectives of QoS Management Based on QoAS for 3G Communication Systems
R. Lojacono,
M. Re,
M. Caciotta,
F. Leccese,
D. Petri,
A. Moschitta,
C. Gennarelli,
G. Riccio,
P. Daponte,
S. Rapuano,
D. Grimaldi,
S. Graziani,
S. Sangiovanni
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February 2003
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Wireless Personal Communications: An International Journal
, Volume 24 Issue 2
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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The UMTS appear to be the communication system of the next future. In this
system all the communication services will be included. This means that the
Quality of Service (QoS) will have a great importance. So is envisaged that
the management of the system ...
Keywords: 3G communications systems, QoAS, QoS, TFR, codesign
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13
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HW/SW Auto-Coupling for Fast IP Integration in SoC Designs
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July 2008
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ICESS '08: Proceedings of the 2008 International Conference on Embedded Software and Systems - Volume 00
, Volume 00
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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IP intergration in SoC nowadays contains two design aspects, i.e. hardware interface and software driver. The hardware interface supports necessary signal mapping, protocol translation and data buffering so that an IP can adapt to various system architectures. ...
Keywords: HW/SW codesign, auto-coupling, IP integration, SoC design
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14
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Implications of Codesign as a Natural Constituent of a Systems Engineering Discipline for Computer Based Systems
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March 1996
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CODES '96: Proceedings of the 4th International Workshop on Hardware/Software Co-Design
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Publisher: IEEE Computer Society
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Full text available: |
Pdf
(1.15 MB)
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| Bibliometrics: Downloads (6 Weeks): 6, Downloads (12 Months): 14, Downloads (Overall): 81, Citation Count: 0 |
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Within this paper we argue that Hardware/Software Codesign must first of all be regarded as an important but nevertheless subordinate part of a disciplined procedure of engineering computer based systems in general. Defining so a set of consequences ...
Keywords: Engineering of Computer Based Systems, Hardware/Software- Codesign, Design Theory
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15
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A 17-GHz 130-nm CMOS VCO subsystem module in LTCC-based technology for WLAN applications: Research Articles
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May 2006
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International Journal of RF and Microwave Computer-Aided Engineering
, Volume 16 Issue 3
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Publisher: John Wiley and Sons Ltd.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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This article presents a 17-GHz band VCO for system-in-a-package (SiP) solutions. A workflow for a chip-package codesign, which includes the design of LTCC-inductors, is presented. The VCO shows a phase noise of -110 dBc/Hz at 1-MHz offset and ...
Keywords: 17-GHz band, LTCC, VCO, WLAN, chip-package codesign, system-in-package (SiP)
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16
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Interface synthesis in embedded HW/SW systems
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August 1997
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CHDL'97: Proceedings of the IFIP TC10 WG10.5 international conference on Hardware description languages and their applications : specification, modelling, verification and synthesis of microelectronic systems: specification, modelling, verification and synthesis of microelectronic systems
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Publisher: Chapman & Hall, Ltd.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 1 |
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Keywords: codesign, communication synthesis, telecommunication, template architecture
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17
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Future System-on-Silicon LSI Chips
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July 1998
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IEEE Micro
, Volume 18 Issue 4
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Publisher: IEEE Computer Society Press
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 8 |
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A new three-dimensional (3D) integration technology to achieve system-on-silicon LSIs has been proposed. Several LSI wafers are vertically stacked and glued each other after thinning them in this 3D integration technology. Therefore, this technology ...
Keywords: Large-scale integration, 3D LSI technology, chip packaging, chip-package codesign, multichip modules
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18
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Model Refinement for Hardware-Software Codesign
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March 1996
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EDTC '96: Proceedings of the 1996 European conference on Design and Test
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): 1, Downloads (12 Months): 14, Downloads (Overall): 76, Citation Count: 9 |
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The model refinement task in system-level synthesis transforms a specification from a functional model to a chosen implementation model. In this paper, we categorize several commonly-used implementation models and then describe a set of refinement procedures ...
Keywords: model refinement, system-level synthesis, hardware/software codesign, interface models, communication protocols
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19
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Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
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July 2000
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ASAP '00: Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 1 |
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Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the low performance, while realizing multiprocessor sorting methods on parallel ...
Keywords: Sorting, Systolic Arrays, Hardware/Software-Codesign
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20
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Procedure cloning: a transformation for improved system-level functional partitioning
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January 1999
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Transactions on Design Automation of Electronic Systems (TODAES)
, Volume 4 Issue 1
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Publisher: ACM
 Request Permissions
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Full text available: |
Pdf
(227.98 KB)
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| Bibliometrics: Downloads (6 Weeks): 5, Downloads (12 Months): 41, Downloads (Overall): 339, Citation Count: 3 |
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Functional partitioning assigns the functions of a system's program-like specification among system components, such as standard-software and custom-hardware processors. We introduce a new transformation, called procedure cloning, that significantly ...
Keywords: behavioral synthesis, embedded systems, functional partitioning, hardware/software codesign, replication, system-level design, system-on-a-chip, transformations
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