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1
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A programmable multi-language generator for CoDesign
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February 1998
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DATE '98: Proceedings of the conference on Design, automation and test in Europe
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): 0, Downloads (12 Months): 3, Downloads (Overall): 66, Citation Count: 0 |
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This paper presents an innovative technique to efficiently develop hardware and software code generators. The specification model is first converted into its equivalent data structure. Target programs result from a set of transformation rules applied ...
Keywords: CoDesign, meta-generator, code generator
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2
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System-wide compaction and specialization of the linux kernel
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July 2005
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LCTES '05: Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
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Publisher: ACM
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Full text available: |
 Pdf
(895.17 KB)
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| Bibliometrics: Downloads (6 Weeks): 5, Downloads (12 Months): 44, Downloads (Overall): 524, Citation Count: 7 |
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The limited built-in configurability of Linux can lead to expensive code size overhead when it is used in the embedded market. To overcome this problem, we propose the application of link-time compaction and specialization techniques that exploit the ...
Keywords: compaction, linux kernel, operating system, specialization, system calls
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Also published in: |
| July 2005 |
SIGPLAN Notices |
Volume 40 Issue 7 |
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3
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Simulation of hybrid systems based on hierarchical interval constraints
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March 2009
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Simutools '09: Proceedings of the 2nd International Conference on Simulation Tools and Techniques
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Publisher: ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering)
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Full text available: |
Pdf
(96.24 KB)
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| Bibliometrics: Downloads (6 Weeks): 1, Downloads (12 Months): 7, Downloads (Overall): 7, Citation Count: 0 |
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We propose a framework called HydLa for simple modeling and reliable simulation of hybrid systems which involve discrete and continuous changes over time. HydLa employs interval constraints as a central principle to express uncertainties ...
Keywords: constraint hierarchies, hybrid systems, interval arithmetic, simulation
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4
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Module Musings
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September 1986
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Journal of Pascal, Ada & Modula-2
, Volume 5 Issue 5
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Publisher: SIGS Publications, Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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5
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(Pen)-ultimate tiling?
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August 1994
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Integration, the VLSI Journal
, Volume 17 Issue 1
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Publisher: Elsevier Science Publishers B. V.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 25 |
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6
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Effective management of multiple configurable units using dynamic optimization
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December 2006
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Transactions on Architecture and Code Optimization (TACO)
, Volume 3 Issue 4
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Publisher: ACM
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Full text available: |
Pdf
(443.24 KB)
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| Bibliometrics: Downloads (6 Weeks): 11, Downloads (12 Months): 73, Downloads (Overall): 346, Citation Count: 0 |
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As one of the promising efforts to minimize the surging microprocessor power consumption, adaptive computing environments (ACEs), where microarchitectural resources can be dynamically tuned to match a program's run-time requirement and characteristics, ...
Keywords: Adaptive computing environment (ACE), dynamic optimization, hotspots, power dissipation
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7
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Efficient on-the-fly data race detection in multithreaded C++ programs
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June 2003
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PPoPP '03: Proceedings of the ninth ACM SIGPLAN symposium on Principles and practice of parallel programming
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Publisher: ACM
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Full text available: |
Pdf
(288.53 KB)
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| Bibliometrics: Downloads (6 Weeks): 11, Downloads (12 Months): 122, Downloads (Overall): 762, Citation Count: 23 |
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Data race detection is highly essential for debugging multithreaded programs and assuring their correctness. Nevertheless, there is no single universal technique capable of handling the task efficiently, since the data race detection problem is computationally ...
Keywords: concurrency, data race, instrumentation, multithreading, synchronization
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Also published in: |
| October 2003 |
SIGPLAN Notices |
Volume 38 Issue 10 |
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8
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An effective and efficient code generation algorithm for uniform loops on non-orthogonal DSP architecture
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March 2007
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Journal of Systems and Software
, Volume 80 Issue 3
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Publisher: Elsevier Science Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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To meet ever-increasing demands for higher performance and lower power consumption, many high-end digital signal processors (DSPs) commonly employ non-orthogonal architecture. This architecture typically is characterized by irregular data paths, heterogeneous ...
Keywords: Code generation, DSP, Non-orthogonal architecture
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9
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What's wrong with this code?
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May 1995
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Windows/DOS Developer's Journal
, Volume 6 Issue 5
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Publisher: R & D Publications, Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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10
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Testing student-made compilers
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September 1994
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SIGCSE Bulletin
, Volume 26 Issue 3
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Publisher: ACM
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Full text available: |
Pdf
(535.06 KB)
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| Bibliometrics: Downloads (6 Weeks): 1, Downloads (12 Months): 6, Downloads (Overall): 85, Citation Count: 1 |
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This article presents a few guidelines and examples for testing Pascal compilers designed by students in introductory courses. A standard Pascal subset with little alteration is used, and the possible sources of errors are divided into eight categories. ...
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11
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I/O subsystem configurations for ESA: new roles for processor storage
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April 1993
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IBM Systems Journal
, Volume 32 Issue 2
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Publisher: IBM Corp.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 3 |
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I/O subsystem configurations are dictated by the storage and I/O requirements of the specific applications that use the disk hardware. Treating the latter requirement as a given, however, draws a boundary at the channel interface that is not well-suited ...
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12
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New results on the computability and complexity of points--to analysis
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January 2003
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POPL '03: Proceedings of the 30th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
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Publisher: ACM
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Full text available: |
Pdf
(423.68 KB)
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| Bibliometrics: Downloads (6 Weeks): 6, Downloads (12 Months): 47, Downloads (Overall): 339, Citation Count: 2 |
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Given a program and two variables p and q, the goal of points-to analysis is to check if p can point to q in some execution of the program. This well-studied problem plays a crucial role in compiler optimization. The problem ...
Keywords: complexity, flow-insensitive, flow-sensitive, pointer analysis, undecidability
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Also published in: |
| January 2003 |
SIGPLAN Notices |
Volume 38 Issue 1 |
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13
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On the run-time behaviour of stochastic local search algorithms for SAT
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July 1999
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AAAI '99/IAAI '99: Proceedings of the sixteenth national conference on Artificial intelligence and the eleventh Innovative applications of artificial intelligence conference innovative applications of artificial intelligence
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Publisher: American Association for Artificial Intelligence
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 22 |
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14
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15
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Generative communication in Linda
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January 1985
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Transactions on Programming Languages and Systems (TOPLAS)
, Volume 7 Issue 1
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Publisher: ACM
Request Permissions
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Full text available: |
Pdf
(2.48 MB)
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| Bibliometrics: Downloads (6 Weeks): 41, Downloads (12 Months): 354, Downloads (Overall): 2214, Citation Count: 297 |
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Generative communication is the basis of a new distributed programming langauge that is intended for systems programming in distributed settings generally and on integrated network computers in particular. It differs from previous interprocess communication ...
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16
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Better tiling and array contraction for compiling scientific programs
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November 2002
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Supercomputing '02: Proceedings of the 2002 ACM/IEEE conference on Supercomputing
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Publisher: IEEE Computer Society Press
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Full text available: |
Pdf
(505.52 KB)
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| Bibliometrics: Downloads (6 Weeks): 1, Downloads (12 Months): 11, Downloads (Overall): 198, Citation Count: 7 |
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Scientific programs often include multiple loops over the same data; interleaving parts of different loops may greatly improve performance. We exploit this in a compiler for Titanium, a dialect of Java. Our compiler combines reordering optimizations ...
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18
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Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
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November 2005
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MICRO 38: Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): 2, Downloads (12 Months): 24, Downloads (Overall): 206, Citation Count: 6 |
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Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware synthesis system where the schedule is used to determine various components ...
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19
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The rewards of generating true 32-bit code
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January 1991
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SIGPLAN Notices
, Volume 26 Issue 1
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Publisher: ACM
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Full text available: |
Pdf
(207.80 KB)
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| Bibliometrics: Downloads (6 Weeks): 0, Downloads (12 Months): 13, Downloads (Overall): 82, Citation Count: 0 |
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