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Results 1 - 20 of 6,812
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Experiments in Optimizing FP
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April 1988
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IEEE Transactions on Software Engineering
, Volume 14 Issue 4
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Publisher: IEEE Press
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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FPOPT, a globally optimizing compiler for FP, was built to study the efficiency of compiling a functional programming language by translating it into an intermediate language and then optimizing that intermediate language. This paper describes the FPOPT ...
Keywords: Coupling, FP, functional programming, optimization.
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2
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System timing sets microprocessor performance
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March 1987
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Computer Design
, Volume 26 Issue 6
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Publisher: Penn Well Publishing Company
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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3
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4
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I/O subsystem configurations for ESA: new roles for processor storage
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April 1993
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IBM Systems Journal
, Volume 32 Issue 2
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Publisher: IBM Corp.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 3 |
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I/O subsystem configurations are dictated by the storage and I/O requirements of the specific applications that use the disk hardware. Treating the latter requirement as a given, however, draws a boundary at the channel interface that is not well-suited ...
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5
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A cache coherence protocol for MIN-based multiprocessors
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June 1994
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The Journal of Supercomputing
, Volume 8 Issue 2
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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Keywords: cache coherence, caches, mean value analysis, multiprocessor system, multistage interconnection network, split cache
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6
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Motorola 88200
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June 1992
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A guide to RISC microprocessors
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Publisher: Academic Press Professional, Inc.
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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7
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8
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Organization of array data for concurrent memory access
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January 1988
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MICRO 21: Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
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Publisher: IEEE Computer Society Press
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Full text available: |
 Pdf
(394.37 KB)
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| Bibliometrics: Downloads (6 Weeks): 7, Downloads (12 Months): 9, Downloads (Overall): 123, Citation Count: 4 |
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9
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eRAID: Conserving Energy in Conventional Disk-Based RAID System
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March 2008
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IEEE Transactions on Computers
, Volume 57 Issue 3
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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Recently energy consumption becomes an ever critical concern for both low-end and high-end storage servers and data centers. A majority of existing energy conservation solutions resort to multispeed disks. However, most of current server systems are ...
Keywords: Input/Output Devices, Parallel I/O, Queuing theory, Correlation and regression analysis, energy efficiency, power, disk, RAID, queueing model, storage, redundancy.
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10
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Design of a decompressor engine on a SPARC processor
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September 2005
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SBCCI '05: Proceedings of the 18th annual symposium on Integrated circuits and system design
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Publisher: ACM
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Full text available: |
Pdf
(130.36 KB)
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| Bibliometrics: Downloads (6 Weeks): 3, Downloads (12 Months): 10, Downloads (Overall): 118, Citation Count: 0 |
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Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumption, due to an increase in the cache hit ratio. This paper proposes the design ...
Keywords: code compression, performance
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11
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Characterizing Distributed Shared Memory Performance: A Case Study of the Convex SPP1000
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February 1998
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IEEE Transactions on Parallel and Distributed Systems
, Volume 9 Issue 2
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Publisher: IEEE Press
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 4 |
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Abstract¿In a distributed shared memory (DSM) multiprocessor, the processors cooperate in solving a parallel application by accessing the shared memory. The latency of a memory access depends on several factors, including the distance to the nearest ...
Keywords: Performance evaluation, memory performance, communication performance, microbenchmarking, distributed shared memory, Convex SPP1000.
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12
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Software thermal management of dram memory for multicore systems
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June 2008
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SIGMETRICS '08: Proceedings of the 2008 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
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Publisher: ACM
 Request Permissions
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Full text available: |
Pdf
(881.08 KB)
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| Bibliometrics: Downloads (6 Weeks): 18, Downloads (12 Months): 161, Downloads (Overall): 240, Citation Count: 1 |
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Thermal management of DRAM memory has become a critical issue for server systems. We have done, to our best knowledge, the first study of software thermal management for memory subsystem on real machines. Two recently proposed DTM (Dynamic Thermal Management) ...
Keywords: DRAM memories, thermal management
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13
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Parallel volume rendering on a single-chip SIMD architecture
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October 2001
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PVG '01: Proceedings of the IEEE 2001 symposium on parallel and large-data visualization and graphics
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Publisher: IEEE Press
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Full text available: |
Pdf
(438.37 KB)
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| Bibliometrics: Downloads (6 Weeks): 12, Downloads (12 Months): 45, Downloads (Overall): 432, Citation Count: 3 |
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Volume rendering has great potential for parallelization due to the tremendous number of computations necessary. Besides the enormous computational power needed, the memory interface is usually of crucial importance and frequently the bottleneck.This ...
Keywords: Parallel Processing, Ray Casting, Volume Rendering
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14
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15
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Recoverable Distributed Shared Virtual Memory
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April 1990
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IEEE Transactions on Computers
, Volume 39 Issue 4
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 22 |
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The problem of rollback recovery in distributed shared virtual environments, in which the shared memory is implemented in software in a loosely coupled distributed multicomputer system, is examined. A user-transparent checkpointing recovery scheme and ...
Keywords: distributed processing, distributed shared virtual environments, loosely coupled distributed multicomputer system, memory coherence protocol, rollback recovery, storage management, twin-page disk storage management technique, user-transparent checkpointing recovery scheme, virtual memory, virtual storage.
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16
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Editor's Note
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July 2005
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IEEE Transactions on Computers
, Volume 54 Issue 7
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Publisher: IEEE Computer Society
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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20
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Testing Address Decoder Faults in Two-Port Memories: Fault Models, Tests, Consequences of Port Restrictions, and Test Strategy
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October 2000
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Journal of Electronic Testing: Theory and Applications
, Volume 16 Issue 5
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Publisher: Kluwer Academic Publishers
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| Bibliometrics: Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Downloads (Overall): n/a, Citation Count: 0 |
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A two-port memory contains two duplicated sets of address decoders, which operate independently. Testing such memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests have to be used. ...
Keywords: address decoder faults, fault coverage, fault models, march tests, multi-port memories, read-only ports, single-port memories, write-only ports
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