Exploiting FPGA concurrency to enhance JVM performance

ABSTRACT

The Java Programming Language has been praised for its platform independence and portability, but because of its slow execution speed on a software Java Virtual Machine (JVM), some people decide to use faster languages such as C. Building a JVM in hardware is an obvious solution to this problem. Several approaches have been taken to try to achieve the best solution. One approach is by reducing the number of Java instructions a program has to execute along with directly executing instructions in hardware, for example on a Field Programmable Gate Array (FPGA), to increase the execution speed. Another approach is the translation of Java Byte Codes into native code by a FPGA and then executing the native code on a conventional CPU. Others have developed a multi-threaded JVM and exploited the parallelism offered by a FPGA and have specifically designed the JVM for real-time systems. This paper compares and contrasts all these approaches and then argues that the parallelism of a FPGA should be exploited in the most general way possible by not restricting the threads of execution to a specific task. It gives a method for building such a JVM and also some results from a JVM that was built using this method. The paper concludes that this approach should be taken to build a system that is capable of running threads of a Java program in parallel.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Algorithms implemented in hardware

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays

  D. Software
  D.3 PROGRAMMING LANGUAGES
      D.3.2 Language Classifications

          Nouns: Java

General Terms:
Design, Experimentation, Languages, Measurement

Keywords:
FPGA, Java virtual machine, field programmable logic