|
ABSTRACT
Because embedded systems mostly target mass production and often run on batteries, they should be cheap to realize and power efficient. In addition, they require a high degree of programmability to provide real-time performance for multiple applications and standards. However, performance requirements as well as cost and power-consumption constraints demand that substantial parts of these systems be implemented in dedicated hardware blocks. As a result, their heterogeneous system architecture consists of components ranging from fully programmable processor cores to fully dedicated hardware components for timecritical application tasks. Increasingly, these designs yield heterogeneous embedded multiprocessor systems that reside together on a single chip. The heterogeneity of these highly programmable systems and the varying demands of their target applications greatly complicate system design. The increasing complexity of embedded- system architectures makes predicting performance behavior more difficult. Therefore, having the appropriate tools to explore different choices at an early design stage is increasingly important. The Artemis modeling and simulation environment aims to efficiently explore the design space of heterogeneous embedded-systems architectures at multiple abstraction levels and for a wide range of applications targeting these architectures. The authors describe their application of this methodology in two studies that showed promising results, providing useful feedback on a wide range of design decisions involving the architectures for the two applications.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
A.D. Pimentel et al., "The Artemis Architecture Workbench," Proc. Progress Workshop Embedded Systems, STW Technology Foundation, Utrecht, the Netherlands, 2000, pp. 53-62.
|
| |
2
|
Proc. Design Automation Conf., ACM Press, New York, 1997, pp. 395-400.
|
| |
3
|
F. Balarin et al., Hardware-Software Codesign of Embedded Systems: The POLIS Approach, Kluwer Academic, Dordrecht, the Netherlands, 1997.
|
| |
4
|
Proc. Int'l Conf. Computer Design, IEEE CS Press, Los Alamitos, Calif., 1995, pp. 58-63.
|
| |
5
|
P. Dreike and J. McCoy, "Cosimulating Software and Hardware in Embedded Systems," Embedded Systems Programming, June 1997, pp. 12-27.
|
| |
6
|
Proc. 7th Int'l Workshop Hardware-Software Codesign, ACM Press, New York, 1999, pp. 142-146.
|
| |
7
|
Proc. Int'l Conf. Application-Specific Systems, Architectures, and Processors, IEEE CS Press, Los Alamitos, Calif., 1997, pp. 338-349.
|
| |
8
|
G. Kahn, "The Semantics of a Simple Language for Parallel Programming," Proc. IFIP Congress 74,North-Holland, Amsterdam, 1974, pp. 471-475.
|
| |
9
|
J. Buck et al., "Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems," Int'l J. Computer Simulation, Apr. 1994, pp. 155-182.
|
| |
10
|
P. Lieverse et al., "A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems," J. VLSI Signal Processing for Signal, Image and Video Technology, special issue on SiPS 99, vol. 29, no. 3, 2001, pp. 197-207.
|
| |
11
|
F. Terpstra et al., "Rapid Evaluation of Instantiations of Embedded Systems Architectures: A Case Study," Proc. PROGRESS Workshop Embedded Systems, STW Technology Foundation, Utrecht, the Netherlands, 2001, pp. 251-260.
|
| |
12
|
Proc. Int'l Conf. Computer-Aided Design, IEEE CS Press, Los Alamitos, Calif., 2001.
|
CITED BY 36
|
|
A. D. Pimentel , S. Polstra , F. Terpstra , A. W. van Halderen , J. E. Coffland , L. O. Hertzberger, Towards efficient design space exploration of heterogeneous embedded media systems, Embedded processor design challenges: systems, architectures, modeling, and simulation-SAMOS, Springer-Verlag New York, Inc., New York, NY, 2002
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
M. Anouar Dziri , Firaz Samet , Flavio Rech Wagner , Wander O. Cesário , Ahmed A. Jerraya, Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTL, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Torsten Kempf , Kingshuk Karuri , Stefan Wallentowitz , Gerd Ascheid , Rainer Leupers , Heinrich Meyr, A SW performance estimation framework for early system-level-design using fine-grained instrumentation, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
|
|
|
|
|
|
|
|
|
|
|
|
Christian Haubelt , Joachim Falk , Joachim Keinert , Thomas Schlichter , Martin Streubühr , Andreas Deyhle , Andreas Hadert , Jürgen Teich, A SystemC-based design methodology for digital signal processing systems, EURASIP Journal on Embedded Systems, v.2007 n.1, p.15-15, January 2007
|
|
|
|
|
|
|
|
|
Yongjin Ahn , Keesung Han , Ganghee Lee , Hyunjik Song , Junhee Yoo , Kiyoung Choi , Xingguang Feng, SoCDAL: System-on-chip design AcceLerator, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.13 n.1, p.1-38, January 2008
|
|
|
|
|
|
|
|
|
Torsten Kempf , Malte Doerper , R. Leupers , G. Ascheid , H. Meyr , Tim Kogel , Bart Vanthournout, A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms, Proceedings of the conference on Design, Automation and Test in Europe, p.876-881, March 07-11, 2005
|
|
|
|
|
|
|
|
|
|
|
|
Sang-Il Han , Soo-Ik Chae , Lisane Brisolara , Luigi Carro , Katalin Popovici , Xavier Guerin , Ahmed A. Jerraya , Kai Huang , Lei Li , Xiaolang Yan, Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation, Integration, the VLSI Journal, v.42 n.2, p.227-245, February, 2009
|
|
|
|
|
|
|
|