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Buffered Steiner trees for difficult instances
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Source International Symposium on Physical Design archive
Proceedings of the 2001 international symposium on Physical design table of contents
Sonoma, California, United States
Pages: 4 - 9  
Year of Publication: 2001
ISBN:1-58113-347-2
Authors
C. J. Alpert  IBM Corp., Austin, TX
Miloš Hrkić  University of Illinois at Chicago, EECS Dept., Chicago, IL
J. Hu  IBM Corp., Austin, TX
A. B. Kahng  University of California at San Diego, CS Dept., San Diego, CA
J. Lillis  University of Illinois at Chicago, EECS Dept., Chicago, IL
B. Liu  University of California at San Diego, CS Dept., San Diego, CA
S. T. Quay  IBM Corp., Austin, TX
S. S. Sapatnekar  University of Minnesota, ECE Dept.
A. J. Sullivan  IBM Corp., Austin, TX
P. Villarrubia  IBM Corp., Austin, TX
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 1,   Downloads (12 Months): 13,   Citation Count: 11
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ABSTRACT

Buffer insertion has become an increasingly critical optimization in high performance design. The problem of finding a delay-optimal buffered Steiner tree has been an active area of research, and excellent solutions exist for most instances. However, current approaches fail to adequately solve a particular class of real-world “difficult” instances which are characterized by a large number of sinks, variations in sink criticalities, and varying polarity requirements. We propose a new Steiner tree construction called C-Tree for these instance types. When combined with van Ginneken style buffer insertion, C-Tree achieves higher quality solutions with fewer resources compared to traditional approaches.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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C. J. Alpert, T. C. Hu, J. H. Huang, A. B. Kahng, D. Karger, "Prim-Dijkstra Tradeoffs for Improved Performance-Driven Routing Tree Design," IEEE TCAD, 14(7), 1995, 890-896.
 
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K.D. Boese, A. B. Kahng, B. A. McCoy, G. Robins, "Nearoptimal Critical Sink Routing Tree Constructions", IEEE Trans. on CAD, 14(12), Dec. 1995, pp. 1417-1436.
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T. F. Gonzalez, "Clustering to Minimize the Maximum Intercluster Distance", Theoretical Comp. Sci., 38, 293-306, 1985.
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J. Lillis, C.-K. Cheng and T.-T. Y. Lin, "Optimal Wire Sizing and Buffer Insertion for Low Power and a Generalized Delay Model", IEEE J. Solid-State Circuits, 31(3), 1996, 437-447.
 
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L. P. P. P. van Ginneken, "Buffer Placement in Distributed RC-tree Networks for Minimal Elmore Delay", Intl. Symposium on Circuits and Systems, 1990, pp. 865-868.

CITED BY  11

Collaborative Colleagues:
C. J. Alpert: colleagues
Miloš Hrkić: colleagues
J. Hu: colleagues
A. B. Kahng: colleagues
J. Lillis: colleagues
B. Liu: colleagues
S. T. Quay: colleagues
S. S. Sapatnekar: colleagues
A. J. Sullivan: colleagues
P. Villarrubia: colleagues