ACM Portal
  Subscribe (Full Service)    Register (Limited Service, Free)    Login
  Search:   The ACM Digital Library   The Guide
  
ACM Home Page
Please provide us with feedback. Feedback
Wattch: a framework for architectural-level power analysis and optimizations
Full text PdfPdf (274 KB)
Source ACM SIGARCH Computer Architecture News archive
Volume 28 ,  Issue 2  (May 2000) table of contents
Special Issue: Proceedings of the 27th annual international symposium on Computer architecture (ISCA '00)
Pages: 83 - 94  
Year of Publication: 2000
ISSN:0163-5964
Also published in ...
Authors
David Brooks  Department of Electrical Engineering, Princeton University
Vivek Tiwari  Intel Corporation
Margaret Martonosi  Department of Electrical Engineering, Princeton University
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 46,   Downloads (12 Months): 363,   Citation Count: 461
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/342001.339657
What is a DOI?

ABSTRACT

Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve high accuracy by calculating power estimates for designs only after layout or floorplanning are complete. In addition to being available only late in the design process, such tools are often quite slow, which compounds the difficulty of running them for a large space of design possibilities. This paper presents Wattch, a framework for analyzing and optimizing microprocessor power dissipation at the architecture-level. Wattch is 1000X or more faster than existing layout-level power tools, and yet maintains accuracy within 10% of their estimates as verified using industry tools on leading-edge designs. This paper presents several validations of Wattch's accuracy. In addition, we present three examples that demonstrate how architects or compiler writers might use Wattch to evaluate power consumption in their design process. We see Wattch as a complement to existing lower-level tools; it allows architects to explore and cull the design space early on, using faster, higher-level tools. It also opens up the field of power-efficient computing to a wider range of researchers by providing a power evaluation methodology within the portable and familiar SimpleScalar framework.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
Mir Azam , Paul Franzon , Wentai Liu, Low power data processing by elimination of redundant computations, Proceedings of the 1997 international symposium on Low power electronics and design, p.259-264, August 18-20, 1997, Monterey, California, United States  [doi>10.1145/263272.263348]
2
R. Iris Bahar , Gianluca Albera , Srilatha Manne, Power and performance tradeoffs using various caching strategies, Proceedings of the 1998 international symposium on Low power electronics and design, p.64-69, August 10-12, 1998, Monterey, California, United States  [doi>10.1145/280756.295115]
 
3
Benjamin Bishop , Thomas P. Kelliher , Mary Jane Irwin, The Design of a Register Renaming Unit, Proceedings of the Ninth Great Lakes Symposium on VLSI, p.34, March 04-06, 1999
 
4
M. Borah, R. Owens, and M. Irwin. Transistor sizing for low power CMOS circuits. IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, 15(6):665- 71, 1996.
 
5
William J. Bowhill , Shane L. Bell , Bradley J. Benschneider , Andrew J. Black , Sharon M. Britton , Ruben W. Castelino , Dale R. Donchin , John H. Edmondson , Harry R. Fair , Paul E. Gronowski , Anil K. Jain , Patricia L. Kroesen , Marc E. Lamere , Bruce J. Loughlin , Shekhar Mehata , Sribalan Santhanam , Timothy A. Shedd , Stephen C. Thierauf , Robert O. Mueller , Ronald P. Preston , Michael J. Smith, Circuit implementation of a 300-MHz 64-bit second-generation CMOS Alpha CPU, Digital Technical Journal, v.7 n.1, p.100-118, Jan. 1995
 
6
David Brooks , Margaret Martonosi, Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance, Proceedings of the 5th International Symposium on High Performance Computer Architecture, p.13, January 09-12, 1999
7
Doug Burger , Todd M. Austin, The SimpleScalar tool set, version 2.0, ACM SIGARCH Computer Architecture News, v.25 n.3, p.13-25, June 1997  [doi>10.1145/268806.268810]
 
8
R. Chen, M. Irwin, and R. Bajwa. An architectural level power estimator. In Power-Driven Microarchitecture Workshop at ISCA25, 1998.
9
Daniel Citron , Dror Feitelson , Larry Rudolph, Accelerating multi-media processing by implementing memoing in multiplication and division units, Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, p.252-261, October 02-07, 1998, San Jose, California, United States
 
10
H. Fair and D. Bailey. Clocking Design and Analysis for a 600MHz Alpha Microprocessor. In ISSCC Digest of Technical Papers, pages 398-399, February 1998.
11
Freddy Gabbay , Avi Mendelson, Using value prediction to increase the power of speculative execution hardware, ACM Transactions on Computer Systems (TOCS), v.16 n.3, p.234-270, Aug. 1998  [doi>10.1145/290409.290411]
 
12
R. Gonzalez and M. Horowitz. Energy Dissipation in General Purpose Microprocessors. IEEE Journal of Solid-State Circuits, 31(9):1277-84, 1996.
13
Michael K. Gowan , Larry L. Biro , Daniel B. Jackson, Power considerations in the design of the Alpha 21264 microprocessor, Proceedings of the 35th annual conference on Design automation, p.726-731, June 15-19, 1998, San Francisco, California, United States  [doi>10.1145/277044.277226]
 
14
L. Gwennap. Intel's P6 uses decoupled superscalar design. Microprocessor Report, pages 9-15, Feb. 16, 1995.
 
15
Q. Jacobson , J. E. Smith, Instruction Pre-Processing in Trace Processors, Proceedings of the 5th International Symposium on High Performance Computer Architecture, p.125, January 09-12, 1999
 
16
Johnson Kin , Munish Gupta , William H. Mangione-Smith, The filter cache: an energy efficient memory structure, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.184-193, December 01-03, 1997, Research Triangle Park, North Carolina, United States
17
Milind B. Kamble , Kanad Ghose, Analytical energy dissipation models for low-power caches, Proceedings of the 1997 international symposium on Low power electronics and design, p.143-148, August 18-20, 1997, Monterey, California, United States  [doi>10.1145/263272.263310]
18
Srilatha Manne , Artur Klauser , Dirk Grunwald, Pipeline gating: speculation control for energy reduction, Proceedings of the 25th annual international symposium on Computer architecture, p.132-141, June 27-July 02, 1998, Barcelona, Spain
 
19
Mentor Graphics Corporation, 1999.
 
20
James Montanaro , Richard T. Witek , Krishna Anne , Andrew J. Black , Elizabeth M. Cooper , Daniel W. Dobberpuhl , Paul M. Donahue , Jim Eno , Gregory W. Hoeppner , David Kruckemyer , Thomas H. Lee , Peter C. M. Lin , Liam Madden , Daniel Murray , Mark H. Pearce , Sribalan Santhanam , Kathryn J. Snyder , Ray Stephany , Stephen C. Thierauf, A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor, Digital Technical Journal, v.9 n.1, p.49-62, 1997
21
Subbarao Palacharla , Norman P. Jouppi , J. E. Smith, Complexity-effective superscalar processors, Proceedings of the 24th annual international symposium on Computer architecture, p.206-218, June 01-04, 1997, Denver, Colorado, United States
 
22
S. Palacharla, N. Jouppi, and J. Smith. Quantifying the Complexity of Superscalar Processors. In Univ. of Wisconsin Computer Science Tech. Report 1328, 1997.
 
23
Hector Sanchez , Belli Kuttanna , Tim Olson , Mike Alexander , Gian Gerosa , Ross Philip , Jose Alvarez, Thermal Management System for High Performance PowerPCTM Microprocessors, Proceedings of the 42nd IEEE International Computer Conference, p.325, February 23-26, 1997
 
24
Kevin Skadron , Pritpal S. Ahuja , Margaret Martonosi , Douglas W. Clark, Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques, IEEE Transactions on Computers, v.48 n.11, p.1260-1281, November 1999  [doi>10.1109/12.811115]
25
Avinash Sodani , Gurindar S. Sohi, Dynamic instruction reuse, Proceedings of the 24th annual international symposium on Computer architecture, p.194-205, June 01-04, 1997, Denver, Colorado, United States
26
G. S. Sohi , S. Vajapeyam, Instruction issue logic for high-performance, interruptable pipelined processors, Proceedings of the 14th annual international symposium on Computer architecture, p.27-34, June 02-05, 1987, Pittsburgh, Pennsylvania, United States  [doi>10.1145/30350.30354]
 
27
Ching-Long Su , A. M. Despain, Cache designs for energy efficiency, Proceedings of the 28th Hawaii International Conference on System Sciences (HICSS'95), p.306, January 04-07, 1995
 
28
Synopsys Corporation. Powermill Data Sheet, 1999.
29
Vivek Tiwari , Deo Singh , Suresh Rajgopal , Gaurav Mehta , Rakesh Patel , Franklin Baez, Reducing power in high-performance microprocessors, Proceedings of the 35th annual conference on Design automation, p.732-737, June 15-19, 1998, San Francisco, California, United States  [doi>10.1145/277044.277227]
 
30
S. Wilton and N. Jouppi. An Enhanced Access and Cycle Time Model for On-chip Caches. In WRL Research Report 93/5, DEC Western Research Laboratory, 1994.
 
31
R. Zimmermann and W. Fichtner. Low-power logic styles: CMOS versus pass-transistor logic. IEEE Journal of Solid- State Circuits, 32(7):1079-90, 1997.
32
V. Zyuban , P. Kogge, The energy complexity of register files, Proceedings of the 1998 international symposium on Low power electronics and design, p.305-310, August 10-12, 1998, Monterey, California, United States  [doi>10.1145/280756.280943]

CITED BY  464
Alexander Chatzigeorgiou , George Stephanides, Energy Metric for Software Systems, Software Quality Control, v.10 n.4, p.355-371, December 2002
P. Grun , N. Dutt , A. Nicolau, Access pattern based local memory customization for low power embedded systems, Proceedings of the conference on Design, automation and test in Europe, p.778-784, March 2001, Munich, Germany
Mladen Nikitovic , Mats Brorsson, An adaptive chip-multiprocessor architecture for future mobile terminals, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
Anoop Iyer , Diana Marculescu, Power and performance evaluation of globally asynchronous locally synchronous processors, ACM SIGARCH Computer Architecture News, v.30 n.2, May 2002
L. Salvemini , M. Sami , D. Sciuto , C. Silvano , V. Zaccaria , R. Zafalon, A methodology for the efficient architectural exploration of energy-delay trade-offs for embedded systems, Proceedings of the 2003 ACM symposium on Applied computing, March 09-12, 2003, Melbourne, Florida
Pat Bohrer , Elmootazbellah N. Elnozahy , Tom Keller , Michael Kistler , Charles Lefurgy , Chandler McDowell , Ram Rajamony, The case for power management in web servers, Power aware computing, Kluwer Academic Publishers, Norwell, MA, 2002
Stefanos Kaxiras , Girija Narlikar , Alan D. Berenbaum , Zhigang Hu, Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads, Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, November 16-17, 2001, Atlanta, Georgia, USA
Amit Nandi , Radu Marculescu, System-level power/performance analysis for embedded systems design, Proceedings of the 38th conference on Design automation, p.599-604, June 2001, Las Vegas, Nevada, United States
Eui-Young Chung , Luca Benini , Giovanni De Micheli, Source code transformation based on software cost analysis, Proceedings of the 14th international symposium on Systems synthesis, September 30-October 03, 2001, Montréal, P.Q., Canada
Greg Semeraro , David H. Albonesi , Steven G. Dropsho , Grigorios Magklis , Sandhya Dwarkadas , Michael L. Scott, Dynamic frequency and voltage control for a multiple clock domain microarchitecture, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
William Fornaciari , Donatella Sciuto , Cristina Silvano , Vittorio Zaccaria, A design framework to efficiently explore energy-delay tradeoffs, Proceedings of the ninth international symposium on Hardware/software codesign, p.260-265, April 2001, Copenhagen, Denmark
J. Adam Butts , Gurindar S. Sohi, A static power model for architects, Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, p.191-201, December 2000, Monterey, California, United States
Stefanos Kaxiras , Zhigang Hu , Margaret Martonosi, Cache decay: exploiting generational behavior to reduce cache leakage power, ACM SIGARCH Computer Architecture News, v.29 n.2, p.240-251, May 2001
Jun Yang , Rajiv Gupta, Frequent value locality and its applications, ACM Transactions on Embedded Computing Systems (TECS), v.1 n.1, p.79-105, November 2002
Nikil Dutt , Alex Nicolau , Hiroyuki Tomiyama , Ashok Halambi, New directions in compiler technology for embedded systems (embedded tutorial), Proceedings of the 2001 conference on Asia South Pacific design automation, p.409-414, January 2001, Yokohama, Japan
T. K. Tan , A. K. Raghunathan , G. Lakishminarayana , N. K. Jha, High-level software energy macro-modeling, Proceedings of the 38th conference on Design automation, p.605-610, June 2001, Las Vegas, Nevada, United States
R. Marculescu , A. Nandi, Probabilistic application modeling for system-level perfromance analysis, Proceedings of the conference on Design, automation and test in Europe, p.572-579, March 2001, Munich, Germany
A. Iyer , D. Marculescu, Power aware microarchitecture resource scaling, Proceedings of the conference on Design, automation and test in Europe, p.190-196, March 2001, Munich, Germany
Jun Yang , Rajiv Gupta, Energy-efficient load and store reuse, Proceedings of the 2001 international symposium on Low power electronics and design, p.72-75, August 2001, Huntington Beach, California, United States
Hojun Shim , Yongsoo Joo , Yongseok Choi , Hyung Gyu Lee , Naehyuck Chang, Low-energy off-chip SDRAM memory systems for embedded applications, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.1, p.98-130, February 2003
Dmitry Ponomarev , Gurhan Kucuk , Kanad Ghose, Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
Wai Sum Mong , Jianwen Zhu, A retargetable micro-architecture simulator, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
Marc L. Corliss , E. Christopher Lewis , Amir Roth, A DISE implementation of dynamic code decompression, ACM SIGPLAN Notices, v.38 n.7, July 2003
Zhigang Hu , Philo Juang , Phil Diodato , Stefanos Kaxiras , Kevin Skadron , Margaret Martonosi , Douglas W. Clark, Managing leakage for transient data: decay and quasi-static 4T memory cells, Proceedings of the 2002 international symposium on Low power electronics and design, August 12-14, 2002, Monterey, California, USA
Emil Talpes , Diana Marculescu, Power reduction through work reuse, Proceedings of the 2001 international symposium on Low power electronics and design, p.340-345, August 2001, Huntington Beach, California, United States
David Brooks , Margaret Martonosi, Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance, ACM Transactions on Computer Systems (TOCS), v.18 n.2, p.89-126, May 2000
Dongkun Shin , Hojun Shim , Yongsoo Joo , Han-Saem Yun , Jihong Kim , Naehyuck Chang, Energy-Monitoring Tool for Low-Power Embedded Programs, IEEE Design & Test, v.19 n.4, p.7-17, July 2002
Jun Yang , Rajiv Gupta, Energy efficient frequent value data cache design, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
Jayanth Srinivasan , Sarita V. Adve, Predictive dynamic thermal management for multimedia applications, Proceedings of the 17th annual international conference on Supercomputing, June 23-26, 2003, San Francisco, CA, USA
Victor Delaluz , Mahmut Kandemir , N. Vijaykrishnan , Anand Sivasubramaniam , Mary Jane Irwin, Hardware and Software Techniques for Controlling DRAM Power Modes, IEEE Transactions on Computers, v.50 n.11, p.1154-1173, November 2001
Christopher J. Hughes , Jayanth Srinivasan , Sarita V. Adve, Saving energy with architectural and frequency adaptations for multimedia applications, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
Kathleen Baynes , Chris Collins , Eric Fiterman , Brinda Ganesh , Paul Kohout , Christine Smit , Tiebing Zhang , Bruce Jacob, The performance and energy consumption of three embedded real-time operating systems, Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, November 16-17, 2001, Atlanta, Georgia, USA
Amirali Baniasadi , Andreas Moshovos, Asymmetric-frequency clustering: a power-aware back-end for high-performance processors, Proceedings of the 2002 international symposium on Low power electronics and design, August 12-14, 2002, Monterey, California, USA
Wael El-Essawy , David H. Albonesi , Balaram Sinharoy, A microarchitectural-level step-power analysis tool, Proceedings of the 2002 international symposium on Low power electronics and design, August 12-14, 2002, Monterey, California, USA
L. N. Chakrapani , P. Korkmaz , V. J. Mooney, III , K. V. Palem , K. Puttaswamy , W. F. Wong, The emerging power crisis in embedded processors: what can a poor compiler do?, Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, November 16-17, 2001, Atlanta, Georgia, USA
Hang-Sheng Wang , Li-Shiuan Peh , Sharad Malik, A Power Model for Routers: Modeling Alpha 21364 and InfiniBand Routers, IEEE Micro, v.23 n.1, p.26-35, January 2003
Russ Joseph , Margaret Martonosi, Run-time power estimation in high performance microprocessors, Proceedings of the 2001 international symposium on Low power electronics and design, p.135-140, August 2001, Huntington Beach, California, United States
Phillip Stanley-Marbell , Michael Hsiao, Fast, flexible, cycle-accurate energy estimation, Proceedings of the 2001 international symposium on Low power electronics and design, p.141-146, August 2001, Huntington Beach, California, United States
Daniele Folegnani , Antonio González, Energy-effective issue logic, ACM SIGARCH Computer Architecture News, v.29 n.2, p.230-239, May 2001
W. Zhang , M. Karakoy , M. Kandemir , G. Chen, A compiler approach for reducing data cache energy, Proceedings of the 17th annual international conference on Supercomputing, June 23-26, 2003, San Francisco, CA, USA
Anoop Iyer , Diana Marculescu, Microarchitecture-level power management, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.3, p.230-239, June 2002
Lode Nachtergaele , Vivek Tiwari , Nikil Dutt, System and architecture-level power reduction of microprocessor-based communication and multi-media applications, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
Radu Marculescu , Amit Nandi , Luciano Lavagno , Alberto Sangiovanni-Vincentelli, System-level power/performance analysis of portable multimedia systems communicating over wireless channels, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
Ruchira Sasanka , Christopher J. Hughes , Sarita V. Adve, Joint local and global hardware adaptations for energy, ACM SIGOPS Operating Systems Review, v.36 n.5, December 2002
Ronald D. Barnes , Shane Ryoo , Wen-mei W. Hwu, Tolerating Cache-Miss Latency with Multipass Pipelines, IEEE Micro, v.26 n.1, p.40-47, January 2006
N. Vijaykrishnan , Mahmut Kandemir , Mary Jane Irwin , Hyun Suk Kim , Wu Ye , David Duarte, Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework, IEEE Transactions on Computers, v.52 n.1, p.59-76, January 2003
Todd Austin , Eric Larson , Dan Ernst, SimpleScalar: An Infrastructure for Computer System Modeling, Computer, v.35 n.2, p.59-67, February 2002
Hang-Sheng Wang , Xinping Zhu , Li-Shiuan Peh , Sharad Malik, Orion: a power-performance simulator for interconnection networks, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
Yan Luo , Jun Yang , Laxmi N. Bhuyan , Li Zhao, NePSim: A Network Processor Simulator with a Power Evaluation Framework, IEEE Micro, v.24 n.5, p.34-44, September 2004
Grigorios Magklis , Michael L. Scott , Greg Semeraro , David H. Albonesi , Steven Dropsho, Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
K. Basu , A. Choudhary , J. Pisharath , M. Kandemir, Power protocol: reducing power dissipation on off-chip data buses, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
G. Palermo , C. Silvano , S. Valsecchi , V. Zaccaria, A system-level methodology for fast multi-objective design space exploration, Proceedings of the 13th ACM Great Lakes symposium on VLSI, April 28-29, 2003, Washington, D. C., USA
Chung-Hsing Hsu , Ulrich Kremer, The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction, ACM SIGPLAN Notices, v.38 n.5, May 2003
Joydeep Ray , James C. Hoe, High-level modeling and FPGA prototyping of microprocessors, Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays, February 23-25, 2003, Monterey, California, USA
Tao Li , Lizy Kurian John, Run-time modeling and estimation of operating system power consumption, ACM SIGMETRICS Performance Evaluation Review, v.31 n.1, June 2003
Fen Xie , Margaret Martonosi , Sharad Malik, Compile-time dynamic voltage scaling settings: opportunities and limits, ACM SIGPLAN Notices, v.38 n.5, May 2003
Carlos Alvarez , Jesus Corbal , Mateo Valero, Fuzzy Memoization for Floating-Point Multimedia Applications, IEEE Transactions on Computers, v.54 n.7, p.922-927, July 2005
Osman S. Unsal , Raksit Ashok , Israel Koren , C. Mani Krishna , Csaba Andras Moritz, Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.3, p.373-392, August 2003
Xin Lu , Yuzhuo Fu, Reducing leakage power in instruction cache using WDC for embedded processors, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
Nam Sung Kim , Todd Austin , Trevor Mudge , Dirk Grunwald, Challenges for architectural level power modeling, Power aware computing, Kluwer Academic Publishers, Norwell, MA, 2002
Dan Nicolaescu , Alex Veidenbaum , Alex Nicolau, Reducing data cache energy consumption via cached load/store queue, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Tao Li , Lizy Kurian John, Routine based OS-aware microprocessor resource adaptation for run-time operating system power saving, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Andreas Moshovos, Checkpointing alternatives for high performance, power-aware processors, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Carlos Molina , Carles Aliagas , Montse García , Antonio Gonzàlez , Jordi Tubella, Non redundant data cache, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Trevor Mudge, Power: A First-Class Architectural Design Constraint, Computer, v.34 n.4, p.52-58, April 2001
Ann Gordon-Ross , Susan Cotterell , Frank Vahid, Tiny instruction caches for low power embedded systems, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.4, p.449-481, November 2003
Hongbo Yang , Guang R. Gao , Clement Leung, On achieving balanced power consumption in software pipelined loops, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
Andreas Hagen , Daniel A. Connors , Bryan L. Pellom, The analysis and design of architecture systems for speech recognition on modern handheld-computing devices, Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, October 01-03, 2003, Newport Beach, CA, USA
Rajeev Krishna , Scott Mahlke , Todd Austin, Architectural optimizations for low-power, real-time speech recognition, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
Shivajit Mohapatra , Radu Cornea , Nikil Dutt , Alex Nicolau , Nalini Venkatasubramanian, Integrated power management for video streaming to mobile handheld devices, Proceedings of the eleventh ACM international conference on Multimedia, November 02-08, 2003, Berkeley, CA, USA
Daniel Chaver , Luis Piñuel , Manuel Prieto , Francisco Tirado , Michael C. Huang, Branch prediction on demand: an energy-efficient solution, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Timothy Sherwood , Suleyman Sair , Brad Calder, Phase tracking and prediction, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Michael D. Powell , T. N. Vijaykumar, Pipeline damping: a microarchitectural technique to reduce inductive noise in supply voltage, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Kevin Skadron , Mircea R. Stan , Wei Huang , Sivakumar Velusamy , Karthik Sankaranarayanan , David Tarjan, Temperature-aware microarchitecture, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Roland E. Wunderlich , Thomas F. Wenisch , Babak Falsafi , James C. Hoe, SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Michael C. Huang , Jose Renau , Josep Torrellas, Positional adaptation of processors: application to energy reduction, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Weiping Liao , Lei He, Power modeling and reduction of VLIW processors, Compilers and operating systems for low power, Kluwer Academic Publishers, Norwell, MA, 2003
Aravindh Anantaraman , Kiran Seth , Kaustubh Patil , Eric Rotenberg , Frank Mueller, Virtual simple architecture (VISA): exceeding the complexity limit in safe real-time systems, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Hsien-Hsin S. Lee , Chinnakrishnan S. Ballapuram, Energy efficient D-TLB and data cache using semantic-aware multilateral partitioning, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Karthik Natarajan , Heather Hanson , Stephen W. Keckler , Charles R. Moore , Doug Burger, Microprocessor pipeline energy analysis, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Emil Talpes , Diana Marculescu, A critical analysis of application-adaptive multiple clock processors, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
I. Kadayif , M. Kandemir , G. Chen , N. Vijaykrishnan , M. J. Irwin , A. Sivasubramaniam, Compiler-directed high-level energy estimation and optimization, ACM Transactions on Embedded Computing Systems (TECS), v.4 n.4, p.819-850, November 2005
David Brooks , Pradip Bose , Margaret Martonosi, Power-performance simulation: design and validation strategies, ACM SIGMETRICS Performance Evaluation Review, v.31 n.4, p.13-18, March 2004
Jason Flinn , M. Satyanarayanan, Managing battery lifetime with energy-aware adaptation, ACM Transactions on Computer Systems (TOCS), v.22 n.2, p.137-179, May 2004
Praveen Vellanki , Nilanjan Banerjee , Karam S. Chatha, Quality-of-service and error control techniques for mesh-based network-on-chip architectures, Integration, the VLSI Journal, v.38 n.3, p.353-382, January 2005
Saurabh Chheda , Osman Unsal , Israel Koren , C. Mani Krishna , Csaba Andras Moritz, Combining compiler and runtime IPC predictions to reduce energy in next generation architectures, Proceedings of the 1st conference on Computing frontiers, April 14-16, 2004, Ischia, Italy
Kim Hazelwood , David Brooks, Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Prabhat Mishra , Mahesh Mamidipaka , Nikil Dutt, Processor-memory coexploration using an architecture description language, ACM Transactions on Embedded Computing Systems (TECS), v.3 n.1, p.140-162, February 2004
Weiping Liao , Fei Li , Lei He, Microarchitecture level power and thermal simulation considering temperature dependent leakage model, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Kathleen Baynes , Chris Collins , Eric Fiterman , Brinda Ganesh , Paul Kohout , Christine Smit , Tiebing Zhang , Bruce Jacob, The Performance and Energy Consumption of Embedded Real-Time Operating Systems, IEEE Transactions on Computers, v.52 n.11, p.1454-1469, November 2003
Kevin Skadron , Mircea R. Stan , Karthik Sankaranarayanan , Wei Huang , Sivakumar Velusamy , David Tarjan, Temperature-aware microarchitecture: Modeling and implementation, ACM Transactions on Architecture and Code Optimization (TACO), v.1 n.1, p.94-125, March 2004
Glenn Reinman , Brad Calder, Using a serial cache for energy efficient instruction fetching, Journal of Systems Architecture: the EUROMICRO Journal, v.50 n.11, p.675-685, November 2004
Yingmin Li , David Brooks , Zhigang Hu , Kevin Skadron , Pradip Bose, Understanding the energy efficiency of simultaneous multithreading, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Victor De La Luz , Ismail Kadayif , Mahmut Kandemir , Uger Sezer, Access Pattern Restructuring for Memory Energy, IEEE Transactions on Parallel and Distributed Systems, v.15 n.4, p.289-303, April 2004
Kavel M. Büyüksahin , Priyadarsan Patra , Farid N. Najm, ESTIMA: an architectural-level power estimator for multi-ported pipelined register files, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Michael D. Powell , T. N. Vijaykumar, Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Madhavi Valluri , Lizy John , Heather Hanson, Exploiting compiler-generated schedules for energy savings in high-performance processors, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Jayaprakash Pisharath , Alok Choudhary, An integrated approach to reducing power dissipation in memory hierarchies, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
Diana Marculescu , Anoop Iyer, Application-driven processor design exploration for power-performance trade-off analysis, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
G. Surendra , S. Banerjee , S. K. Nandy, On the effectiveness of flow aggregation in improving instruction reuse in network processing applications, International Journal of Parallel Programming, v.31 n.6, p.469-487, December 2003
Philo Juang , Kevin Skadron , Margaret Martonosi , Zhigang Hu , Douglas W. Clark , Philip W. Diodato , Stefanos Kaxiras, Implementing branch-predictor decay using quasi-static memory cells, ACM Transactions on Architecture and Code Optimization (TACO), v.1 n.2, p.180-219, June 2004
Alper Buyuktosunoglu , Tejas Karkhanis , David H. Albonesi , Pradip Bose, Energy efficient co-adaptive instruction fetch and issue, ACM SIGARCH Computer Architecture News, v.31 n.2, May 2003
Soontae Kim , N. Vijaykrishnan , M. J. Irwin , L. K. John, On load latency in low-power caches, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
Stephen Hines , David Whalley , Gary Tyson, Adapting compilation techniques to enhance the packing of instructions into registers, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
I. Kadayif , A. Sivasubramaniam , M. Kandemir , G. Kandiraju , G. Chen, Generating physical addresses directly for saving instruction TLB energy, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
Dan Ernst , Todd Austin, Efficient dynamic scheduling through tag elimination, ACM SIGARCH Computer Architecture News, v.30 n.2, May 2002
Giovanni Beltrame , Gianluca Palermo , Donatella Sciuto , Cristina Silvano, Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
Dharmesh Parikh , Kevin Skadron , Yan Zhang , Mircea Stan, Power-Aware Branch Prediction: Characterization and Design, IEEE Transactions on Computers, v.53 n.2, p.168-186, February 2004
Anish Muttreja , Anand Raghunathan , Srivaths Ravi , Niraj K. Jha, Automated energy/performance macromodeling of embedded software, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
Jeffrey Palm , Han Lee , Amer Diwan , J. Eliot B. Moss, When to use a compilation service?, ACM SIGPLAN Notices, v.37 n.7, July 2002
Zhigang Hu , Stefanos Kaxiras , Margaret Martonosi, Let caches decay: reducing leakage energy via exploitation of cache generational behavior, ACM Transactions on Computer Systems (TOCS), v.20 n.2, p.161-190, May 2002
M. Monchiero , G. Palermo , M. Sami , C. Silvano , V. Zaccaria , R. Zafalon, Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors, Proceedings of the 14th ACM Great Lakes symposium on VLSI, April 26-28, 2004, Boston, MA, USA
Sudarshan Banerjee , Nikil Dutt, FIFO power optimization for on-chip networks, Proceedings of the 14th ACM Great Lakes symposium on VLSI, April 26-28, 2004, Boston, MA, USA
Seokwoo Lee , Shidhartha Das , Valeria Bertacco , Todd Austin , David Blaauw , Trevor Mudge, Circuit-aware architectural simulation, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
G. Surendra , Subhasis Banerjee , S. K. Nandy, Power-performance trade-off using pipeline delays, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.384-386, January 27-30, 2004, Yokohama, Japan
Wei Huang , Mircea R. Stan , Kevin Skadron , Karthik Sankaranarayanan , Shougata Ghosh , Sivakumar Velusam, Compact thermal modeling for temperature-aware design, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
Xiaotong Zhuang , Santosh Pande, Power-efficient prefetching via bit-differential offset assignment on embedded processors, ACM SIGPLAN Notices, v.39 n.7, July 2004
Raksit Ashok , Saurabh Chheda , Csaba Andras Moritz, Coupling compiler-enabled and conventional memory accessing for energy efficiency, ACM Transactions on Computer Systems (TOCS), v.22 n.2, p.180-213, May 2004
Kun Zhang , Tao Zhang , Santosh Pande, Binary translation to improve energy efficiency through post-pass register re-allocation, Proceedings of the 4th ACM international conference on Embedded software, September 27-29, 2004, Pisa, Italy
Ruchira Sasanka , Sarita V. Adve , Yen-Kuang Chen , Eric Debes, The energy efficiency of CMP vs. SMT for multimedia workloads, Proceedings of the 18th annual international conference on Supercomputing, June 26-July 01, 2004, Malo, France
Fen Xie , Margaret Martonosi , Sharad Malik, Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling, ACM Transactions on Architecture and Code Optimization (TACO), v.1 n.3, p.323-367, September 2004
Jason D. Hiser , Jack W. Davidson, EMBARC: an efficient memory bank assignment algorithm for retargetable compilers, ACM SIGPLAN Notices, v.39 n.7, July 2004
Yu Bai , R. Iris Bahar, A low-power in-order/out-of-order issue queue, ACM Transactions on Architecture and Code Optimization (TACO), v.1 n.2, p.152-179, June 2004
Venkata Syam P. Rapaka , Emil Talpes , Diana Marculescu, Mixed-clock issue queue design for energy aware, high-performance cores, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.380-383, January 27-30, 2004, Yokohama, Japan
Lieven Eeckhout , Koen De Bosschere, How accurate should early design stage power/performance tools be? A case study with statistical simulation, Journal of Systems and Software, v.73 n.1, p.45-62, September 2004
D. Brooks , P. Bose , V. Srinivasan , M. K. Gschwind , P. G. Emma , M. G. Rosenfield, New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors, IBM Journal of Research and Development, v.47 n.5-6, p.653-670, September 2003
Emil Talpes , Diana Marculescu, Impact of technology scaling on energy aware execution cache-based microarchitectures, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Tom Vander Aa , Murali Jayapala , Francisco Barat , Geert Deconinck , Rudy Lauwereins , Francky Catthoor , Henk Corporaal, Instruction buffering exploration for low energy VLIWs with instruction clusters, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.824-829, January 27-30, 2004, Yokohama, Japan
Yan Luo , Jun Yang , Laxmi N. Bhuyan , Li Zhao, NePSim: A Network Processor Simulator with a Power Evaluation Framework, IEEE Micro, v.24 n.5, p.34-44, September 2004
Jayaprakash Pisharath , Alok Choudhary , Mahmut Kandemir, Reducing energy consumption of queries in memory-resident database systems, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
Noel Eisley , Li-Shiuan Peh, High-level power analysis for on-chip networks, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
Mihai Budiu , Girish Venkataramani , Tiberiu Chelcea , Seth Copen Goldstein, Spatial computation, ACM SIGARCH Computer Architecture News, v.32 n.5, December 2004
Jagadeesh Kaza , Chaitali Chakrabarti, Design and implementation of low-energy turbo decoders, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.9, p.968-977, September 2004
Pin Zhou , Vivek Pandey , Jagadeesan Sundaresan , Anand Raghuraman , Yuanyuan Zhou , Sanjeev Kumar, Dynamic tracking of page miss ratio curve for memory management, ACM SIGOPS Operating Systems Review, v.38 n.5, December 2004
Qiang Wu , Philo Juang , Margaret Martonosi , Douglas W. Clark, Formal online methods for voltage/frequency control in multiple clock domain microprocessors, ACM SIGARCH Computer Architecture News, v.32 n.5, December 2004
Tiberiu Chelcea , Steven M. Nowick, Robust interfaces for mixed-timing systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.8, p.857-873, August 2004
Chia-Lin Yang , Chien-Hao Lee, HotSpot cache: joint temporal and spatial locality exploitation for i-cache energy reduction, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Magnus Ekman , Per Stenström , Fredrik Dahlgren, TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors, Proceedings of the 2002 international symposium on Low power electronics and design, August 12-14, 2002, Monterey, California, USA
Karthik Sankaranarayanan , Kevin Skadron, Profile-based adaptation for cache decay, ACM Transactions on Architecture and Code Optimization (TACO), v.1 n.3, p.305-322, September 2004
Marc L. Corliss , E. Christopher Lewis , Amir Roth, The implementation and evaluation of dynamic code decompression using DISE, ACM Transactions on Embedded Computing Systems (TECS), v.4 n.1, p.38-72, February 2005
Ikhwan Lee , Yongseok Choi , Youngjin Cho , Yongsoo Joo , Hyeonmin Lim , Hyung Gyu Lee , Hojun Shim , Naehyuck Chang, Web-Based Energy Exploration Tool for Embedded Systems, IEEE Design & Test, v.21 n.6, p.572-586, November 2004
Diana Marculescu, Application adaptive energy efficient clustered architectures, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Nam Sung Kim , Taeho Kgil , Valeria Bertacco , Todd Austin , Trevor Mudge, Microarchitectural power modeling techniques for deep sub-micron microprocessors, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Amirali Baniasadi , Andreas Moshovos, SEPAS: a highly accurate energy-efficient branch predictor, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
Subhasis Banerjee , G. Surendra , S. K. Nandy, Exploiting program execution phases to trade power and performance for media workload, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.387-389, January 27-30, 2004, Yokohama, Japan
Jayaprakash Pisharath , Alok Choudhary , Mahmut Kandemir, Energy management schemes for memory-resident database systems, Proceedings of the thirteenth ACM international conference on Information and knowledge management, November 08-13, 2004, Washington, D.C., USA
Amol Bakshi , Jingzhao Ou , Viktor K. Prasanna, Towards automatic synthesis of a class of application-specific sensor networks, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
Xiaotong Zhuang , Tao Zhang , Santosh Pande, Hardware-managed register allocation for embedded processors, ACM SIGPLAN Notices, v.39 n.7, July 2004
Hai Li , Chen-Yong Cher , Kaushik Roy , T. N. Vijaykumar, Combined circuit and architectural level variable supply-voltage scaling for low power, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.13 n.5, p.564-576, May 2005
John S. Seng , Eric S. Tune , Dean M. Tullsen, Reducing power with dynamic critical path information, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
Philo Juang , Qiang Wu , Li-Shiuan Peh , Margaret Martonosi , Douglas W. Clark, Coordinated, distributed, formal energy management of chip multiprocessors, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Tilman Wolf , Mark A. Franklin, Performance Models for Network Processor Design, IEEE Transactions on Parallel and Distributed Systems, v.17 n.6, p.548-561, June 2006
G. Surendra , Subhasis Banerjee , S. K. Nandy, On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort, Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture, p.88-95, June 20-20, 2004, Munich, Germany
Emil Talpes , Diana Marculescu, Execution cache-based microarchitecture power-efficient superscalar processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.13 n.1, p.14-26, January 2005
David M. Brooks , Pradip Bose , Stanley E. Schuster , Hans Jacobson , Prabhakar N. Kudva , Alper Buyuktosunoglu , John-David Wellman , Victor Zyuban , Manish Gupta , Peter W. Cook, Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors, IEEE Micro, v.20 n.6, p.26-44, November 2000
Victor Shnayder , Mark Hempstead , Bor-rong Chen , Geoff Werner Allen , Matt Welsh, Simulating the power consumption of large-scale sensor network applications, Proceedings of the 2nd international conference on Embedded networked sensor systems, November 03-05, 2004, Baltimore, MD, USA
José L. Ayala , Alexander Veidenbaum , Marisa López-Vallejo, Power-aware compilation for register file energy reduction, International Journal of Parallel Programming, v.31 n.6, p.451-467, December 2003
Yingmin Li , Mark Hempstead , Patrick Mauro , David Brooks , Zhigang Hu , Kevin Skadron, Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Daniel Chaver , Miguel A. Rojas , Luis Pinuel , Manuel Prieto , Francisco Tirado , Michael C. Huang, Energy-aware fetch mechanism: trace cache and BTB customization, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
M. Monchiero , G. Palermo , M. Sami , C. Silvano , V. Zaccaria , R. Zafalon, Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach, Integration, the VLSI Journal, v.38 n.3, p.515-524, January 2005
Steve Haga , Natasha Reeves , Rajeev Barua , Diana Marculescu, Dynamic functional unit assignment for low power, The Journal of Supercomputing, v.31 n.1, p.47-62, January 2005
I. Kadayif , A. Sivasubramaniam , M. Kandemir , G. Kandiraju , G. Chen, Optimizing instruction TLB energy using software and hardware techniques, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.10 n.2, p.229-257, April 2005
Hai Li , Yiran Chen , Kaushik Roy , Cheng-Kok Koh, SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
Kuo-Su Hsiao , Chung-Ho Chen, An efficient wakeup design for energy reduction in high-performance superscalar processors, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
Jaume Abella , Antonio González , Xavier Vera , Michael F. P. O'Boyle, IATAC: a smart predictor to turn-off L2 cache lines, ACM Transactions on Architecture and Code Optimization (TACO), v.2 n.1, p.55-77, March 2005
S. W. Son , G. Chen , M. Kandemir, Power-aware code scheduling for clusters of active disks, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Ozcan Ozturk , Feng Wang , Mahmut Kandemir , Yuan Xie, Optimal topology exploration for application-specific 3D architectures, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
W. L. Bircher , M. Valluri , J. Law , L. K. John, Runtime identification of microprocessor energy saving opportunities, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Andhi Janapsatya , Aleksandar Ignjatović , Sri Parameswaran, A novel instruction scratchpad memory optimization method based on concomitance metric, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
Jose Renau , Karin Strauss , Luis Ceze , Wei Liu , Smruti Sarangi , James Tuck , Josep Torrellas, Thread-Level Speculation on a CMP can be energy efficient, Proceedings of the 19th annual international conference on Supercomputing, June 20-22, 2005, Cambridge, Massachusetts
Murali Jayapala , Francisco Barat , Tom Vander Aa , Francky Catthoor , Henk Corporaal , Geert Deconinck, Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors, IEEE Transactions on Computers, v.54 n.6, p.672-683, June 2005
Xueqi Cheng , Michael S. Hsiao, Region-level approximate computation reuse for power reduction in multimedia applications, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Jason Cong , Ashok Jagannathan , Glenn Reinman , Yuval Tamir, Understanding the energy efficiency of SMT and CMP with multiclustering, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Yan Luo , Jia Yu , Jun Yang , Laxmi Bhuyan, Low power network processor design using clock gating, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
J. W. Sheaffer , D. Luebke , K. Skadron, A flexible simulation framework for graphics architectures, Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware, August 29-30, 2004, Grenoble, France
Fen Xie , Margaret Martonosi , Sharad Malik, Efficient behavior-driven runtime dynamic voltage scaling policies, Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 19-21, 2005, Jersey City, NJ, USA
Swarup Bhunia , Animesh Datta , Nilanjan Banerjee , Kaushik Roy, GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks, IEEE Transactions on Computers, v.54 n.6, p.752-766, June 2005
Brett H. Meyer , Joshua J. Pieper , JoAnn M. Paul , Jeffrey E. Nelson , Sean M. Pieper , Anthony G. Rowe, Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors, IEEE Transactions on Computers, v.54 n.6, p.684-697, June 2005
Michael J. Geiger , Sally A. McKee , Gary S. Tyson, Drowsy region-based caches: minimizing both dynamic and static power dissipation, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
Yi-Ping You , Chung-Wen Huang , Jenq Kuen Lee, A sink-n-hoist framework for leakage power reduction, Proceedings of the 5th ACM international conference on Embedded software, September 18-22, 2005, Jersey City, NJ, USA
Il Park , Michael D. Powell , T. N. Vijaykumar, Reducing register ports for higher speed and lower energy, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
K. Ananda Vardhan , Y. N. Srikant, Transition aware scheduling: increasing continuous idle-periods in resource units, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
Yi-Ping You , Chingren Lee , Jenq Kuen Lee, Compilers for leakage power reduction, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.11 n.1, p.147-164, January 2006
Chinnakrishnan S. Ballapuram , Hsien-Hsin S. Lee , Milos Prvulovic, Synonymous address compaction for energy reduction in data TLB, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Wei Zhang , Mahmut Kandemir , Mustafa Karakoy , Guangyu Chen, Reducing data cache leakage energy using a compiler-based approach, ACM Transactions on Embedded Computing Systems (TECS), v.4 n.3, p.652-678, August 2005
Diana Marculescu , Emil Talpes, Variability and energy awareness: a microarchitecture-level perspective, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
Viji Srinivasan , David Brooks , Michael Gschwind , Pradip Bose , Victor Zyuban , Philip N. Strenski , Philip G. Emma, Optimizing pipelines for power and performance, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
Tony Givargis, Zero cost indexing for improved processor cache performance, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.11 n.1, p.3-25, January 2006
Madhavi G. Valluri , Lizy K. John , Kathryn S. McKinley, Low-power, low-complexity instruction issue using compiler assistance, Proceedings of the 19th annual international conference on Supercomputing, June 20-22, 2005, Cambridge, Massachusetts
Julia Chen , Philo Juang , Kevin Ko , Gilberto Contreras , David Penry , Ram Rangan , Adam Stoler , Li-Shiuan Peh , Margaret Martonosi, Hardware-modulated parallelism in chip multiprocessors, ACM SIGARCH Computer Architecture News, v.33 n.4, November 2005
Praveen Kalla , Jörg Henkel , Xiaobo Sharon Hu, SEA: fast power estimation for micro-architectures, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
Rama Sangireddy , Huesung Kim , Arun K. Somani, Low-Power High-Performance Reconfigurable Computing Cache Architectures, IEEE Transactions on Computers, v.53 n.10, p.1274-1290, October 2004
Masafumi Onouchi , Tetsuya Yamada , Kimihiro Morikawa , Isamu Mochizuki , Hidetoshi Sekine, A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
Jason Cong , Ashok Jagannathan , Yuchun Ma , Glenn Reinman , Jie Wei , Yan Zhang, An automated design flow for 3D microarchitecture evaluation, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
Giovanni Agosta , Gianluca Palermo , Cristina Silvano, Multi-objective co-exploration of source code transformations and design space architectures for low-power embedded systems, Proceedings of the 2004 ACM symposium on Applied computing, March 14-17, 2004, Nicosia, Cyprus
Xun Liu , Marios C. Papaefthymiou, HyPE: hybrid power estimation for IP-based programmable systems, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
Sudhakar Bobba , Tyler Thorp , Kathirgamar Aingaran , Dean Liu, IC power distribution challenges, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
Ikhwan Lee , Hyunsuk Kim , Peng Yang , Sungjoo Yoo , Eui-Young Chung , Kyu-Myung Choi , Jeong-Taek Kong , Soo-Kwan Eo, PowerViP: Soc power estimation framework at transaction level, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
Ed Grochowski , David Ayers , Vivek Tiwari, Microarchitectural dI/dt Control, IEEE Design & Test, v.20 n.3, p.40-47, May 2003
Ahmad Zmily , Christos Kozyrakis, Energy-efficient and high-performance instruction fetch using a block-aware ISA, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Juan L. Aragon , Jose Gonzalez , Antonio Gonzalez, Control Speculation for Energy-Efficient Next-Generation Superscalar Processors, IEEE Transactions on Computers, v.55 n.3, p.281-291, March 2006
David Wang , Brinda Ganesh , Nuengwong Tuaycharoen , Kathleen Baynes , Aamer Jaleel , Bruce Jacob, DRAMsim: a memory system simulator, ACM SIGARCH Computer Architecture News, v.33 n.4, November 2005
Fen Xie , Margaret Martonosi , Sharad Malik, Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Yongxin Zhu , Weng-Fai Wong , Ştefan Andrei, An integrated performance and power model for superscalar processor designs, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
H. Shafi , P. J. Bohrer , J. Phelan , C. A. Rusu , J. L. Peterson, Design and validation of a performance and power simulator for PowerPC systems, IBM Journal of Research and Development, v.47 n.5-6, p.641-651, September 2003
Mohamed Gomaa , Michael D. Powell , T. N. Vijaykumar, Heat-and-run: leveraging SMT and CMP to manage power density through the operating system, ACM SIGARCH Computer Architecture News, v.32 n.5, December 2004
Jian Li , José F. Martínez, Power-performance considerations of parallel computing on chip multiprocessors, ACM Transactions on Architecture and Code Optimization (TACO), v.2 n.4, p.397-422, December 2005
Yen-Wei Wu , Chia-Lin Yang , Ping-Hung Yuh , Yao-Wen Chang, Joint exploration of architectural and physical design spaces with thermal consideration, Proceedings of the 2005 international symposium on Low power electronics and design, August 08-10, 2005, San Diego, CA, USA
Jayanth Srinivasan , Sarita V. Adve , Pradip Bose , Jude A. Rivers, Lifetime Reliability: Toward an Architectural Solution, IEEE Micro, v.25 n.3, p.70-80, May 2005
Jinson Koppanalil , Prakash Ramrakhyani , Sameer Desai , Anu Vaidyanathan , Eric Rotenberg, A case for dynamic pipeline scaling, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
Michael D. Powell , Amit Agarwal , T. N. Vijaykumar , Babak Falsafi , Kaushik Roy, Reducing set-associative cache energy via way-prediction and selective direct-mapping, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
Rajeev Balasubramonian , Sandhya Dwarkadas , David H. Albonesi, Reducing the complexity of the register file in dynamic superscalar processors, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
Anoop Iyer , Diana Marculescu, Power efficiency of voltage scaling in multiple clock, multiple voltage cores, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.379-386, November 10-14, 2002, San Jose, California
Gilberto Contreras , Margaret Martonosi , Jinzhan Peng , Roy Ju , Guei-Yuan Lueh, XTREM: a power simulator for the Intel XScale® core, ACM SIGPLAN Notices, v.39 n.7, July 2004
Emil Talpes , Diana Marculescu, Toward a multiple clock/voltage island design style for power-aware processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.13 n.5, p.591-603, May 2005
DongRui Fan , HongBo Yang , GuangRong Gao , RongCai Zhao, Evaluation and choice of various branch predictors for low-power embedded processor, Journal of Computer Science and Technology, v.18 n.6, p.833-838, November 2003
Andhi Janapsatya , Aleksandar Ignjatović , Sri Parameswaran, Finding optimal L1 cache configuration for embedded systems, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
Kiran Puttaswamy , Gabriel H. Loh, Thermal analysis of a 3D die-stacked high-performance microprocessor, Proceedings of the 16th ACM Great Lakes symposium on VLSI, April 30-May 01, 2006, Philadelphia, PA, USA
Zuqiu Mao , Jiaoying Shi, TOIGP: a new hierarchical depth occlusion, Proceedings of the 2006 ACM international conference on Virtual reality continuum and its applications, June 14-April 17, 2006, Hong Kong, China
Ben Lee , Eriko Nurvitadhi , Reshma Dixit , Chansu Yu , Myungchul Kim, Dynamic voltage scaling techniques for power efficient video decoding, Journal of Systems Architecture: the EUROMICRO Journal, v.51 n.10-11, p.633-652, October/November 2005
N. P. Carter , A. Hussain, Modeling wire delay, area, power, and performance in a simulation infrastructure, IBM Journal of Research and Development, v.50 n.2/3, p.311-319, March 2006
Kaveh Jokar Deris , Amirali Baniasadi, Branchless cycle prediction for embedded processors, Proceedings of the 2006 ACM symposium on Applied computing, April 23-27, 2006, Dijon, France
Raksit Ashok , Saurabh Chheda , Csaba Andras Moritz, Cool-Mem: combining statically speculative memory accessing with selective address translation for energy efficiency, ACM SIGOPS Operating Systems Review, v.36 n.5, December 2002
Csaba Andras Moritz , Donald Yeung , Anant Agarwal, SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures, IEEE Transactions on Parallel and Distributed Systems, v.12 n.7, p.730-742, July 2001
Osman S. Unsal , Raksit Ashok , Israel Koren , C. Mani Krishna , Csaba Andras Moritz, Cool-cache for hot multimedia, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
Ye Wen , Selim Gurun , Navraj Chohan , Rich Wolski , Chandra Krintz, Accurate and scalable simulation of network of heterogeneous sensor devices, Journal of Signal Processing Systems, v.50 n.2, p.115-136, February 2008
Houman Homayoun , Sudeep Pasricha , Mohammad Makhzan , Alex Veidenbaum, Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors, ACM SIGPLAN Notices, v.43 n.7, July 2008
YongKang Zhu , Grigorios Magklis , Michael L. Scott , Chen Ding , David H. Albonesi, The Energy Impact of Aggressive Loop Fusion, Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques, p.153-164, September 29-October 03, 2004
Mahesh Mamidipaka , Kamal Khouri , Nikil Dutt , Magdy Abadir, IDAP: A Tool for High Level Power Estimation of Custom Array Structures, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.113, November 09-13, 2003
Ramon Canal , Antonio González , James E. Smith, Software-Controlled Operand-Gating, Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, p.125, March 20-24, 2004, Palo Alto, California
Ahmad Zmily , Christos Kozyrakis, Simultaneously improving code size, performance, and energy in embedded processors, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
Eric L. Hill , Mikko H. Lipasti, Stall cycle redistribution in a transparent fetch pipeline, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Mahmut Kandemir , Seung Woo Son, Reducing power through compiler-directed barrier synchronization elimination, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Noel Eisley , Vassos Soteriou , Li-Shiuan Peh, High-level power analysis for multi-core chips, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
Mahim Mishra , Timothy J. Callahan , Tiberiu Chelcea , Girish Venkataramani , Seth C. Goldstein , Mihai Budiu, Tartan: evaluating spatial computation for whole program execution, ACM SIGOPS Operating Systems Review, v.40 n.5, December 2006
Vidyasagar Nookala , David J. Lilja , Sachin S. Sapatnekar, Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Hiroshi Sasaki , Masaaki Kondo , Hiroshi Nakamura, Energy-efficient dynamic instruction scheduling logic through instruction grouping, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Mats Brorsson , Mikael Collin, Adaptive and flexible dictionary code compression for embedded applications, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
Grigorios Magklis , Pedro Chaparro , José González , Antonio González, Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Anahita Shayesteh , Glenn Reinman , Norm Jouppi , Tim Sherwood , Suleyman Sair, Improving the performance and power efficiency of shared helpers in CMPs, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
Jason E. Miller , Anant Agarwal, Software-based instruction caching for embedded processors, ACM SIGOPS Operating Systems Review, v.40 n.5, December 2006
Chengmo Yang , Alex Orailoglu, Power-efficient instruction delivery through trace reuse, Proceedings of the 15th international conference on Parallel architectures and compilation techniques, September 16-20, 2006, Seattle, Washington, USA
Pedro Trancoso , Paraskevas Evripidou , Kyriakos Stavrou , Costas Kyriacou, A case for chip multiprocessors based on the data-driven multithreading model, International Journal of Parallel Programming, v.34 n.3, p.213-235, June 2006
Kaveh Jokar Deris , Amirali Baniasadi, Investigating cache energy and latency break-even points in high performance processors, Proceedings of the 2006 workshop on MEmory performance: DEaling with Applications, systems and architectures, p.13-20, September 16-20, 2006, Seattle, Washington
YongKang Zhu , David H. Albonesi, Synergistic temperature and energy management in GALS processor architectures, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Chinnakrishnan Ballapuram , Kiran Puttaswamy , Gabriel H. Loh , Hsien-Hsin S. Lee, Entropy-based low power data TLB design, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
Alok Garg , Fernando Castro , Michael Huang , Daniel Chaver , Luis Piñuel , Manuel Prieto, Substituting associative load queue with simple hash tables in out-of-order microprocessors, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Wonbok Lee , Kimish Patel , Massoud Pedram, Dynamic thermal management for MPEG-2 decoding, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
Kiran Seth , Aravindh Anantaraman , Frank Mueller , Eric Rotenberg, FAST: Frequency-aware static timing analysis, ACM Transactions on Embedded Computing Systems (TECS), v.5 n.1, p.200-224, February 2006
Guangyu Chen , Feihui Li , Mahmut Kandemir , Mary Jane Irwin, Reducing NoC energy consumption through compiler-directed channel voltage scaling, ACM SIGPLAN Notices, v.41 n.6, June 2006
Roland E. Wunderlich , Thomas F. Wenisch , Babak Falsafi , James C. Hoe, Statistical sampling of microarchitecture simulation, ACM Transactions on Modeling and Computer Simulation (TOMACS), v.16 n.3, p.197-224, July 2006
Vinod Viswanath , Jacob A. Abraham , Warren A. Hunt, Jr, Automatic insertion of low power annotations in RTL for pipelined microprocessors, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
Michael Healy , Mario Vittes , Mongkol Ekpanyapong , Chinnakrishnan Ballapuram , Sung Kyu Lim , Hsien-Hsin S. Lee , Gabriel H. Loh, Microarchitectural floorplanning under performance and thermal tradeoff, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
Rajarshi Mukherjee , Seda Ogrenci Memik, Systematic temperature sensor allocation and placement for microprocessors, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
Madhavi Valluri , Lizy John , Heather Hanson, Hybrid-scheduling for reduced energy consumption in high-performance processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.14 n.9, p.1039-1043, September 2006
Michael Behar , Avi Mendelson , Avinoam Kolodny, Trace cache sampling filter, ACM Transactions on Computer Systems (TOCS), v.25 n.1, p.3-es, February 2007
Joshua J. Yi , Hans Vandierendonck , Lieven Eeckhout , David J. Lilja, The exigency of benchmark and compiler drift: designing tomorrow's processors with yesterday's tools, Proceedings of the 20th annual international conference on Supercomputing, June 28-July 01, 2006, Cairns, Queensland, Australia
Kyungsu Kang , Jungsoo Kim , Heejun Shim , Chong-Min Kyung, Software power estimation using IPI(inter-prefetch interval) power model for advanced off-the-shelf processor, Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI, March 11-13, 2007, Stresa-Lago Maggiore, Italy
Shiwen Hu , Madhavi Valluri , Lizy Kurian John, Effective management of multiple configurable units using dynamic optimization, ACM Transactions on Architecture and Code Optimization (TACO), v.3 n.4, p.477-501, December 2006
Michele Co , Dee A. B. Weikle , Kevin Skadron, Evaluating trace cache energy efficiency, ACM Transactions on Architecture and Code Optimization (TACO), v.3 n.4, p.450-476, December 2006
Davy Genbrugge , Lieven Eeckhout , Koen De Bosschere, Accurate memory data flow modeling in statistical simulation, Proceedings of the 20th annual international conference on Supercomputing, June 28-July 01, 2006, Cairns, Queensland, Australia
Matteo Monchiero , Ramon Canal , Antonio González, Design space exploration for multicore architectures: a power/performance/thermal view, Proceedings of the 20th annual international conference on Supercomputing, June 28-July 01, 2006, Cairns, Queensland, Australia
Yongpan Liu , Robert P. Dick , Li Shang , Huazhong Yang, Accurate temperature-dependent integrated circuit leakage power estimation is easy, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
Tejas S. Karkhanis , James E. Smith, Automated design of application specific superscalar processors: an analytical approach, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
Christophe Lemuet , Jack Sampson , Jean-Francois Collard , Norm Jouppi, Architecture---The potential energy efficiency of vector acceleration, Proceedings of the 2006 ACM/IEEE conference on Supercomputing, November 11-17, 2006, Tampa, Florida
H. Blume , D. Becker , L. Rotenberg , M. Botteck , J. Brakensiek , T. G. Noll, Hybrid functional- and instruction-level power modeling for embedded and heterogeneous processor architectures, Journal of Systems Architecture: the EUROMICRO Journal, v.53 n.10, p.689-702, October, 2007
Jiang Lin , Hongzhong Zheng , Zhichun Zhu , Howard David , Zhao Zhang, Thermal modeling and management of DRAM memory systems, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
Jason D. Hiser , Jack W. Davidson , David B. Whalley, Fast, accurate design space exploration of embedded systems memory configurations, Proceedings of the 2007 ACM symposium on Applied computing, March 11-15, 2007, Seoul, Korea
Stephen Roderick Hines , Gary Tyson , David Whalley, Addressing instruction fetch bottlenecks by using an instruction register file, ACM SIGPLAN Notices, v.42 n.7, July 2007
Frederik Vandeputte , Lieven Eeckhout , Koen De Bosschere, Exploiting program phase behavior for energy reduction on multi-configuration processors, Journal of Systems Architecture: the EUROMICRO Journal, v.53 n.8, p.489-500, August, 2007
Masaaki Kondo , Hiroshi Sasaki , Hiroshi Nakamura, Improving fairness, throughput and energy-efficiency on a chip multiprocessor through DVFS, ACM SIGARCH Computer Architecture News, v.35 n.1, March 2007
Mootaz Elnozahy , Michael Kistler , Ramakrishnan Rajamony, Energy conservation policies for web servers, Proceedings of the 4th conference on USENIX Symposium on Internet Technologies and Systems, p.8-8, March 26-28, 2003, Seattle, WA
Gilberto Contreras , Margaret Martonosi , Jinzhang Peng , Guei-Yuan Lueh , Roy Ju, The XTREM power and performance simulator for the Intel XScale core: Design and experiences, ACM Transactions on Embedded Computing Systems (TECS), v.6 n.1, February 2007
Mahmut Kandemir , Taylan Yemliha , Seung Woo Son , Ozcan Ozturk, Memory bank aware dynamic loop scheduling, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
Clint W. Smullen , Tarek M. Taha, PSATSim: an interactive graphical superscalar architecture simulator for power and performance analysis, Proceedings of the 2006 workshop on Computer architecture education: held in conjunction with the 33rd International Symposium on Computer Architecture, June 17, 2006, Boston, Massachusetts
Juan Hamers , Lieven Eeckhout, Resource prediction for media stream decoding, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
Alex Gontmakher , Avi Mendelson , Assaf Schuster, Using fine grain multithreading for energy efficient computing, Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming, March 14-17, 2007, San Jose, California, USA
Xiaotong Zhuang , Santosh Pande, Power-efficient prefetching for embedded processors, ACM Transactions on Embedded Computing Systems (TECS), v.6 n.1, February 2007
Kimish Patel , Wonbok Lee , Massoud Pedram, Active bank switching for temperature control of the register file in a microprocessor, Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI, March 11-13, 2007, Stresa-Lago Maggiore, Italy
Dmitry Ponomarev , Gurhan Kucuk , Kanad Ghose, Dynamic Resizing of Superscalar Datapath Components for Energy Efficiency, IEEE Transactions on Computers, v.55 n.2, p.199-213, February 2006
Gregory J. Briggs , Edwin J. Tan , Nicholas A. Nelson , David H. Albonesi, QUILT: a GUI-based integrated circuit floorplanning environment for computer architecture research and education, Proceedings of the 2005 workshop on Computer architecture education: held in conjunction with the 32nd International Symposium on Computer Architecture, June 05, 2005, Madison, Wisconsin
Yao Guo , Vladimir Vlassov , Raksit Ashok , Richard Weiss , Csaba Andras Moritz, Synchronization coherence: A transparent hardware mechanism for cache coherence and fine-grained synchronization, Journal of Parallel and Distributed Computing, v.68 n.2, p.165-181, February, 2008
Ahmad Zmily , Christos Kozyrakis, Block-aware instruction set architecture, ACM Transactions on Architecture and Code Optimization (TACO), v.3 n.3, p.327-357, September 2006
Francisco J. Mesa-Martínez , Michael C. Huang , Jose Renau, SEED: scalable, efficient enforcement of dependences, Proceedings of the 15th international conference on Parallel architectures and compilation techniques, September 16-20, 2006, Seattle, Washington, USA
Seunghoon Kim , Robert P. Dick , Russ Joseph, Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems, Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, September 30-October 03, 2007, Salzburg, Austria
Yuki Kobayashi , Murali Jayapala , Praveen Raghavan , Francky Catthoor , Masaharu Imai, Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.12 n.4, p.41-es, September 2007
Mathias Stäger , Paul Lukowicz , Gerhard Tröster, Power and accuracy trade-offs in sound-based context recognition systems, Pervasive and Mobile Computing, v.3 n.3, p.300-327, June, 2007
Jingzhao Ou , Viktor K. Prasanna, Rapid energy estimation for hardware-software codesign using FPGAs, EURASIP Journal on Embedded Systems, v.2006 n.1, p.17-17, January 2006
Eric Senn , Johann Laurent , Nathalie Julien , Eric Martin, Softexplorer: estimating and optimizing the power and energy consumption of a C program for DSP applications, EURASIP Journal on Applied Signal Processing, v.2005 n.1, p.2641-2654, 1 January 2005
Francisco J. Mesa-Martinez , Michael Brown , Joseph Nayfach-Battilana , Jose Renau, Measuring performance, power, and temperature from real processors, Proceedings of the 2007 workshop on Experimental computer science, p.16-es, June 13-14, 2007, San Diego, California
Cagkan Erbas , Andy D. Pimentel , Mark Thompson , Simon Polstra, A framework for system-level modeling and simulation of embedded systems architectures, EURASIP Journal on Embedded Systems, v.2007 n.1, p.2-2, January 2007
Ruchira Sasanka , Man-Lap Li , Sarita V. Adve , Yen-Kuang Chen , Eric Debes, ALP: Efficient support for all levels of parallelism for complex media applications, ACM Transactions on Architecture and Code Optimization (TACO), v.4 n.1, p.3-es, March 2007
Yan Luo , Jia Yu , Jun Yang , Laxmi N. Bhuyan, Conserving network processor power consumption by exploiting traffic variability, ACM Transactions on Architecture and Code Optimization (TACO), v.4 n.1, p.4-es, March 2007
Francisco J. Mesa-Martinez , Michael Brown , Joseph Nayfach-Battilana , Jose Renau, Measuring performance, power, and temperature from real processors, Experimental computer science on Experimental computer science, p.17-17, June 13-14, 2007, San Diego
Tiffany M. Mintz , James P. Davis, Low-power tradeoffs for mobile computing applications: embedded processors versus custom computing kernels, Proceedings of the 45th annual southeast regional conference, March 23-24, 2007, Winston-Salem, North Carolina
Hushrav D. Mogal , Kia Bazargan, Microarchitecture floorplanning for sub-threshold leakage reduction, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
Mark Oskin, The revolution inside the box, Communications of the ACM, v.51 n.7, July 2008
Ozcan Ozturk , Mahmut Kandemir, ILP-Based energy minimization techniques for banked memories, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.13 n.3, p.1-40, July 2008
Guangyu Chen , Feihui Li , S. W. Son , M. Kandemir, Application mapping for chip multiprocessors, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
Houman Homayoun , Sudeep Pasricha , Mohammad Makhzan , Alex Veidenbaum, Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
Shashidhar Mysore , Banit Agrawal , Rodolfo Neuber , Timothy Sherwood , Nisheeth Shrivastava , Subhash Suri, Formulating and implementing profiling over adaptive ranges, ACM Transactions on Architecture and Code Optimization (TACO), v.5 n.1, p.1-32, May 2008
Soontae Kim , Narayanan Vijaykrishnan , Mary J. Irwin, Reducing non-deterministic loads in low-power caches via early cache set resolution, Microprocessors & Microsystems, v.31 n.5, p.293-301, August, 2007
Francisco Javier Mesa-Martinez , Joseph Nayfach-Battilana , Jose Renau, Power model validation through thermal measurements, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
Abhishek Tiwari , Smruti R. Sarangi , Josep Torrellas, ReCycle:: pipeline adaptation to tolerate process variation, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
Meeta S. Gupta , Jarod L. Oatley , Russ Joseph , Gu-Yeon Wei , David M. Brooks, Understanding voltage variations in chip multiprocessors using a distributed power-delivery network, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
Rajiv Ravindran , Michael Chu , Scott Mahlke, Compiler-managed partitioned data caches for low power, ACM SIGPLAN Notices, v.42 n.7, July 2007
Michael D. Powell , T. N. Vijaykumar, Exploiting Resonant Behavior to Reduce Inductive Noise, ACM SIGARCH Computer Architecture News, v.32 n.2, p.288, March 2004
Smruti R. Sarangi , Wei Liu, Josep Torrellas , Yuanyuan Zhou, ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing, Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, p.257-270, November 12-16, 2005, Barcelona, Spain
Lieven Eeckhout , Robert H. Bell Jr. , Bastiaan Stougie , Koen De Bosschere , Lizy K. John, Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies, ACM SIGARCH Computer Architecture News, v.32 n.2, p.350, March 2004
Michael D. Powell , Ethan Schuchman , T. N. Vijaykumar, Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines, Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, p.294-304, November 12-16, 2005, Barcelona, Spain
Christopher J. Hughes , Sarita V. Adve, A Formal Approach to Frequent Energy Adaptations for Multimedia Applications, ACM SIGARCH Computer Architecture News, v.32 n.2, p.138, March 2004
Ronald D. Barnes , Shane Ryoo , Wen-mei W. Hwu, "Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense, Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, p.319-330, November 12-16, 2005, Barcelona, Spain
Roni Rosner , Yoav Almog , Micha Moffie , Naftali Schwartz , Avi Mendelson, Power Awareness through Selective Dynamically Optimized Traces, ACM SIGARCH Computer Architecture News, v.32 n.2, p.162, March 2004
Andhi Janapsatya , Sri Parameswaran , A. Ignjatovic, Hardware/software managed scratchpad memory for embedded system, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.370-377, November 07-11, 2004
Jayanth Srinivasan , Sarita V. Adve , Pradip Bose , Jude A. Rivers, The Case for Lifetime Reliability-Aware Microprocessors, ACM SIGARCH Computer Architecture News, v.32 n.2, p.276, March 2004
Clinton Wills Smullen, IV , Shahrukh Rohinton Tarapore , Sudhanva Gurumurthi , Parthasarathy Ranganathan , Mustafa Uysal, Active storage revisited: the case for power and performance benefits for unstructured data processing applications, Proceedings of the 2008 conference on Computing frontiers, May 05-07, 2008, Ischia, Italy
Stefan Valentin Gheorghita , Henk Corporaal , Twan Basten, Iterative compilation for energy reduction, Journal of Embedded Computing, v.1 n.4, p.509-520, December 2005
Gianluca Palermo , Cristina Silvano , Vittorio Zaccaria, Multi-objective design space exploration of embedded systems, Journal of Embedded Computing, v.1 n.3, p.305-316, August 2005
José L. Ayala , Marisa López-Vallejo, Integrating functional and power simulation in embedded systems design, Journal of Embedded Computing, v.1 n.3, p.325-340, August 2005
Tom Vander Aa , Murali Jayapala , Francisco Barat , Geert Deconinck , Rudy Lauwereins , Henk Corporaal , Francky Catthoor, Instruction buffering exploration for low energy embedded processors, Journal of Embedded Computing, v.1 n.3, p.341-351, August 2005
Lieven Eeckhout , Dirk Stroobandt , Koen De Bosschere, Efficient Microprocessor Design Space Exploration through Statistical Simulation, Proceedings of the 36th annual symposium on Simulation, p.233, March 30-April 02, 2003
Minh Q. Do , Mindaugas Drazdziulis , Per Larsson-Edefors , Lars Bengtsson, Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration, Proceedings of the 7th International Symposium on Quality Electronic Design, p.557-563, March 27-29, 2006
G. M. Link , N. Vijaykrishnan, Thermal Trends in Emerging Technologies, Proceedings of the 7th International Symposium on Quality Electronic Design, p.625-632, March 27-29, 2006
Fayez Mohamood , Michael B. Healy , Sung Kyu Lim , Hsien-Hsin S. Lee, A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, p.3-14, December 09-13, 2006
Hyesoon Kim , Jose A. Joao , Onur Mutlu , Yale N. Patt, Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, p.53-64, December 09-13, 2006
Fernando Castro , Luis Pinuel , Daniel Chaver , Manuel Prieto , Michael Huang , Francisco Tirado, DMDC: Delayed Memory Dependence Checking through Age-Based Filtering, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, p.297-308, December 09-13, 2006
Andreas Moshovos, RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence, ACM SIGARCH Computer Architecture News, v.33 n.2, p.234-245, May 2005
Weiping Liao , Lei He, Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.574, November 09-13, 2003
Emil Talpes , Diana Marculescu, Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines, ACM SIGARCH Computer Architecture News, v.33 n.2, p.310-321, May 2005
Vlad Petric , Amir Roth, Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection, ACM SIGARCH Computer Architecture News, v.33 n.2, p.322-333, May 2005
Gianluca Palermo , Cristina Silvano , Vittorio Zaccaria, Power-Performance System-Level Exploration of a MicroSPARC2-Based Embedded Architecture, Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum, p.20182, March 03-07, 2003
Jayanth Srinivasan , Sarita V. Adve , Pradip Bose , Jude A. Rivers, Exploiting Structural Duplication for Lifetime Reliability Enhancement, ACM SIGARCH Computer Architecture News, v.33 n.2, p.520-531, May 2005
Yunsi Fei , Srivaths Ravi , Anand Raghunathan , Niraj K. Jha, Energy Estimation for Extensible Processors, Proceedings of the conference on Design, Automation and Test in Europe, p.10682, March 03-07, 2003
Shiwen Hu , Madhavi Valluri , Lizy Kurian John, Effective Adaptive Computing Environment Management via Dynamic Optimization, Proceedings of the international symposium on Code generation and optimization, p.63-73, March 20-23, 2005
Steve Haga , Natasha Reeves , Rajeev Barua , Diana Marculescu, Dynamic Functional Unit Assignment for Low Power, Proceedings of the conference on Design, Automation and Test in Europe, p.11052, March 03-07, 2003
Venkata Syam P. Rapaka , Diana Marculescu, Pre-Characterization Free, Efficient Power/Performance Analysis of Embedded and General Purpose Software Applications, Proceedings of the conference on Design, Automation and Test in Europe, p.10504, March 03-07, 2003
Dan Nicolaescu , Alex Veidenbaum , Alex Nicolau, Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors, Proceedings of the conference on Design, Automation and Test in Europe, p.11064, March 03-07, 2003
Mahesh Mamidipaka , Nikil Dutt, On-chip Stack Based Memory Organization for Low Power Embedded Architectures, Proceedings of the conference on Design, Automation and Test in Europe, p.11082, March 03-07, 2003
Kapil Vaswani , Matthew J. Thazhuthaveetil , Y. N. Srikant, A Programmable Hardware Path Profiler, Proceedings of the international symposium on Code generation and optimization, p.217-228, March 20-23, 2005
Jose A. Joao , Onur Mutlu , Hyesoon Kim , Rishi Agarwal , Yale N. Patt, Improving the performance of object-oriented languages with dynamic predication of indirect jumps, ACM SIGOPS Operating Systems Review, v.42 n.2, March 2008
Abu Saad Papa , Madhu Mutyam, Power management of variation aware chip multiprocessors, Proceedings of the 18th ACM Great Lakes symposium on VLSI, May 04-06, 2008, Orlando, Florida, USA
Reinaldo Bergamaschi , Guoling Han , Alper Buyuktosunoglu , Hiren Patel , Indira Nair , Gero Dittmann , Geert Janssen , Nagu Dhanwada , Zhigang Hu , Pradip Bose , John Darringer, Exploring power management in multi-core systems, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
Quming Zhou , Lin Zhong , Kartik Mohanram, Power signal processing: a new perspective for power analysis and optimization, Proceedings of the 2007 international symposium on Low power electronics and design, August 27-29, 2007, Portland, OR, USA
Eric F. Weglarz , Kewal K. Saluja , Mikko H. Lipasti, Minimizing Energy Consumption for High-Performance Processing, Proceedings of the 2002 conference on Asia South Pacific design automation/VLSI Design, p.199, January 07-11, 2002
Hai Li , Chen-Yong Cher , T. N. Vijaykumar , Kaushik Roy, VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.19, December 03-05, 2003
Zeshan Chishti , Michael D. Powell , T. N. Vijaykumar, Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.55, December 03-05, 2003
Se-Hyun Yang , Babak Falsafi, Near-Optimal Precharging in High-Performance Nanoscale CMOS Caches, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.67, December 03-05, 2003
Rakesh Kumar , Keith I. Farkas , Norman P. Jouppi , Parthasarathy Ranganathan , Dean M. Tullsen, Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.81, December 03-05, 2003
Kevin Skadron, Hybrid Architectural Dynamic Thermal Management, Proceedings of the conference on Design, automation and test in Europe, p.10010, February 16-20, 2004
Yingmin Li , Dharmesh Parikh , Yan Zhang , Karthik Sankaranarayanan , Mircea Stan , Kevin Skadron, State-Preserving vs. Non-State-Preserving Leakage Control in Caches, Proceedings of the conference on Design, automation and test in Europe, p.10022, February 16-20, 2004
Mladen Nikitovic , Mats Brorsson, A Low Power Strategy for Future Mobile Terminals, Proceedings of the conference on Design, automation and test in Europe, p.10702, February 16-20, 2004
Hassan Sbeyti , Smail Niar , Lieven Eeckhout, Adaptive Prefetching for Multimedia Applications in Embedded Systems, Proceedings of the conference on Design, automation and test in Europe, p.21350, February 16-20, 2004
Juan Luis Aragon , Dan Nicolaescu , Alex Veidenbaum , Ana-Maria Badulescu, Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors, Proceedings of the conference on Design, automation and test in Europe, p.21374, February 16-20, 2004
I. Bate, Systematic approaches to understanding and evaluating design trade-offs, Journal of Systems and Software, v.81 n.8, p.1253-1271, August, 2008
Van Bui , Boyana Norris , Kevin Huck , Lois Curfman McInnes , Li Li , Oscar Hernandez , Barbara Chapman, A component infrastructure for performance and power modeling of parallel scientific applications, Proceedings of the 2008 compFrame/HPC-GECO workshop on Component based high performance, October 16-17, 2008, Karlsruhe, Germany
Yongsoo Joo , Youngjin Cho , Donghwa Shin , Jaehyun Park , Naehyuck Chang, An energy characterization platform for memory devices and energy-aware data compression for multilevel-cell flash memory, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.13 n.3, p.1-29, July 2008
David Tarjan , Michael Boyer , Kevin Skadron, Federation: repurposing scalar cores for out-of-order instruction issue, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
Mahmut Kandemir , Ozcan Ozturk, Software-directed combined cpu/link voltage scaling fornoc-based cmps, ACM SIGMETRICS Performance Evaluation Review, v.36 n.1, June 2008
Jonathan A. Winter , David H. Albonesi, Addressing thermal nonuniformity in SMT workloads, ACM Transactions on Architecture and Code Optimization (TACO), v.5 n.1, p.1-28, May 2008
B. Neumann , T. Sydow , H. Blume , T. G. Noll, Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs, Journal of Signal Processing Systems, v.53 n.1-2, p.129-143, November 2008
Mafijul Md. Islam , Magnus Själander , Per Stenström, Early detection and bypassing of trivial operations to improve energy efficiency of processors, Microprocessors & Microsystems, v.32 n.4, p.183-196, June, 2008
Juan Hamers , Lieven Eeckhout, Automated hardware-independent scenario identification, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
Ankush Varma , Bruce Jacob , Eric Debes , Igor Kozintsev , Paul Klein, Accurate and fast system-level power modeling: An XScale-based case study, ACM Transactions on Embedded Computing Systems (TECS), v.6 n.4, p.26-es, September 2007
Christos Strydis , Di Zhu , Georgi N. Gaydadjiev, Profiling of symmetric-encryption algorithms for a novel biomedical-implant architecture, Proceedings of the 2008 conference on Computing frontiers, May 05-07, 2008, Ischia, Italy
Ahmad Zmily , Christos Kozyrakis, A low power front-end for embedded processors using a block-aware instruction set, Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, September 30-October 03, 2007, Salzburg, Austria
Yi-Ying Tsai , Chia-Jung Hsu , Chung-Ho Chen, Power-efficient and scalable load/store queue design via address compression, Proceedings of the 2008 ACM symposium on Applied computing, March 16-20, 2008, Fortaleza, Ceara, Brazil
Jaw-Wei Chi , Chia-Lin Yang , Yi-Jung Chen , Jien-Jia Chen, Cache leakage control mechanism for hard real-time systems, Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, September 30-October 03, 2007, Salzburg, Austria
Frederico Pratas , Georgi Gaydadjiev , Mladen Berekovic , Leonel Sousa , Stefanos Kaxiras, Low power microarchitecture with instruction reuse, Proceedings of the 2008 conference on Computing frontiers, May 05-07, 2008, Ischia, Italy
Hiroaki Shikano , Masaki Ito , Kunio Uchiyama , Toshihiko Odaka , Akihiro Hayashi , Takeshi Masuura , Masayoshi Mase , Jun Shirako , Yasutaka Wada , Keiji Kimura , Hironori Kasahara, Software-cooperative power-efficient heterogeneous multi-core for media processing, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
Erika Gunadi , Mikko H. Lipasti, Power-aware operand delivery, Proceedings of the 2007 international symposium on Low power electronics and design, August 27-29, 2007, Portland, OR, USA
Michael Healy , Fayez Mohamood , Hsien-Hsin S. Lee , Sung Kyu Lim, A unified methodology for power supply noise reduction in modern microarchitecture design, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
Meeta Sharma Gupta , Krishna K. Rangan , Michael D. Smith , Gu-Yeon Wei , David Brooks, Towards a software approach to mitigate voltage emergencies, Proceedings of the 2007 international symposium on Low power electronics and design, August 27-29, 2007, Portland, OR, USA
Jun Yao , Shinobu Miwa , Hajime Shimada , Shinji Tomita, Optimal pipeline depth with pipeline stage unification adoption, ACM SIGARCH Computer Architecture News, v.35 n.5, December 2007
Sebastian Herbert , Diana Marculescu, Analysis of dynamic voltage/frequency scaling in chip-multiprocessors, Proceedings of the 2007 international symposium on Low power electronics and design, August 27-29, 2007, Portland, OR, USA
Reinaldo Bergamaschi , Indira Nair , Gero Dittmann , Hiren Patel , Geert Janssen , Nagu Dhanwada , Alper Buyuktosunoglu , Emrah Acar , Gi-Joon Nam , Dorothy Kucar , Pradip Bose , John Darringer , Guoling Han, Performance modeling for early analysis of multi-core systems, Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, September 30-October 03, 2007, Salzburg, Austria
Michael D. Powell , T. N. Vijaykumar, Resource area dilation to reduce power density in throughput servers, Proceedings of the 2007 international symposium on Low power electronics and design, August 27-29, 2007, Portland, OR, USA
Konrad Malkowski , Padma Raghavan , Mahmut Kandemir , Mary Jane Irwin, Phase-aware adaptive hardware selection for power-efficient scientific computations, Proceedings of the 2007 international symposium on Low power electronics and design, August 27-29, 2007, Portland, OR, USA
Xiaoyao Liang , Kerem Turgay , David Brooks, Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques, Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, November 05-08, 2007, San Jose, California
Ankush Varma , Eric Debes , Igor Kozintsev , Paul Klein , Bruce Jacob, Accurate and fast system-level power modeling: An XScale-based case study, ACM Transactions on Embedded Computing Systems (TECS), v.7 n.3, p.1-20, April 2008
Arun Rangasamy , Rahul Nagpal , Y.N. Srikant, Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture, Proceedings of the 2008 conference on Computing frontiers, May 05-07, 2008, Ischia, Italy
Yi-Ping You , Chung-Wen Huang , Jenq Kuen Lee, Compilation for compact power-gating controls, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.12 n.4, p.51-es, September 2007
Juan L. Aragón , Alexander V. Veidenbaum, Optimizing CAM-based instruction cache designs for low-power embedded systems, Journal of Systems Architecture: the EUROMICRO Journal, v.54 n.12, p.1155-1163, December, 2008
Dae Hyun Kim , Sung Kyu Lim, Bus-aware microarchitectural floorplanning, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
Marco A. Ramirez , Adrian Cristal , Mateo Valero , Alexander V. Veidenbaum , Luis Villa, A partitioned instruction queue to reduce instruction wakeup energy, International Journal of High Performance Computing and Networking, v.1 n.4, p.153-161, December 2004
Miquel Pericas , Eduard Ayguade , Javier Zalamea , Josep Llosa , Mateo Valero, High-performance and low-power VLIW cores for numerical computations, International Journal of High Performance Computing and Networking, v.1 n.4, p.171-179, December 2004
Xiaodong Li , Ritu Gupta , Sarita V. Adve , Yuanyuan Zhou, Cross-component energy management: Joint adaptation of processor and memory, ACM Transactions on Architecture and Code Optimization (TACO), v.4 n.3, p.14-es, September 2007
Kaveh Jokar Deris , Amirali Baniasadi, Investigating cache energy and latency break-even points in high performance processors, ACM SIGARCH Computer Architecture News, v.35 n.4, September 2007
Davy Genbrugge , Lieven Eeckhout, Memory Data Flow Modeling in Statistical Simulation for the Efficient Exploration of Microprocessor Design Spaces, IEEE Transactions on Computers, v.57 n.1, p.41-54, January 2008
G. Surendra , Subhasis Banerjee , S. K. Nandy, Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations, Journal of Embedded Computing, v.2 n.1, p.15-34, January 2006
Haakon Dybdahl , Per Gunnar Kjeldsberg , Marius Grannæs , Lasse Natvig, Destructive-read in embedded DRAM, impact on power consumption, Journal of Embedded Computing, v.2 n.2, p.249-260, April 2006
Patrick Anthony La Fratta , James M. Baker, Jr., Exploring power reduction options for a single-chip multiprocessor through system-level modeling, Journal of Embedded Computing, v.2 n.2, p.235-247, April 2006
Christos Strydis , Georgi N. Gaydadjiev, Profiling of lossless-compression algorithms for a novel biomedical-implant architecture, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
Ke Meng , Russ Joseph , Robert P. Dick , Li Shang, Multi-optimization power management for chip multiprocessors, Proceedings of the 17th international conference on Parallel architectures and compilation techniques, October 25-29, 2008, Toronto, Ontario, Canada
Eric P. Villasenor , DaeHo Seo , Mithuna S. Thottethodi, Power-efficient clustering via incomplete bypassing, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Jianwei Chen , Michel Dubois , Per Stenström, SimWattch: Integrating Complete-System and User-Level Performance and Power Simulators, IEEE Micro, v.27 n.4, p.34-48, July 2007
Jianwei Chen , Michel Dubois , Per Stenström, SimWattch: Integrating Complete-System and User-Level Performance and Power Simulators, IEEE Micro, v.27 n.4, p.34-48, July 2007
Wonbok Lee , Kimish Patel , Massoud Pedram, GOP-level dynamic thermal management in MPEG-2 decoding, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.16 n.6, p.662-672, June 2008
Banit Agrawal , Timothy Sherwood, Ternary CAM power and delay model: extensions and uses, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.16 n.5, p.554-564, May 2008
Antonio Flores , Juan L. Aragón , Manuel E. Acacio, An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures, The Journal of Supercomputing, v.45 n.3, p.341-364, September 2008
Elham Safi , Andreas Moshovos , Andreas Veneris, L-CBF: a low-power, fast counting bloom filter architecture, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.16 n.6, p.628-638, June 2008
Shengqi Yang , Wenping Wang , Tiehan Lu , Wayne Wolf , N. Vijaykrishnan , Yuan Xie, Case study of reliability-aware and low-power design, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.16 n.7, p.861-873, July 2008
David R. White , John Clark , Jeremy Jacob , Simon M. Poulding, Searching for resource-efficient programs: low-power pseudorandom number generators, Proceedings of the 10th annual conference on Genetic and evolutionary computation, July 12-16, 2008, Atlanta, GA, USA
Radu Teodorescu , Josep Torrellas, Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors, ACM SIGARCH Computer Architecture News, v.36 n.3, p.363-374, June 2008
Shyamkumar Thoziyoor , Jung Ho Ahn , Matteo Monchiero , Jay B. Brockman , Norman P. Jouppi, A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies, ACM SIGARCH Computer Architecture News, v.36 n.3, p.51-62, June 2008
Subhasis Banerjee , G. Surendra , S. K. Nandy, On the effectiveness of phase based regression models to trade power and performance using dynamic processor adaptation, Journal of Systems Architecture: the EUROMICRO Journal, v.54 n.8, p.797-815, August, 2008
Chung-Ho Chen , Kuo-Su Hsiao, Scalable Dynamic Instruction Scheduler through Wake-Up Spatial Locality, IEEE Transactions on Computers, v.56 n.11, p.1534-1548, November 2007
Huaping Wang , Israel Koren , C. Mani Krishna, An adaptive resource partitioning algorithm for SMT processors, Proceedings of the 17th international conference on Parallel architectures and compilation techniques, October 25-29, 2008, Toronto, Ontario, Canada
Ajay Joshi , Lieven Eeckhout , Robert H. Bell, Jr. , Lizy K. John, Distilling the essence of proprietary workloads into miniature benchmarks, ACM Transactions on Architecture and Code Optimization (TACO), v.5 n.2, p.1-33, August 2008
T. Venkata Kalyan , Madhu Mutyam, Word-interleaved cache: an energy efficient data cache architecture, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Niranjan Soundararajan , Narayanan Vijaykrishnan , Anand Sivasubramaniam, Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Joshua J. Yi , Resit Sendag , David J. Lilja , Douglas M. Hawkins, Speed versus Accuracy Trade-Offs in Microarchitectural Simulations, IEEE Transactions on Computers, v.56 n.11, p.1549-1563, November 2007
Jieyi Long , Seda Ogrenci Memik , Gokhan Memik , Rajarshi Mukherjee, Thermal monitoring mechanisms for chip multiprocessors, ACM Transactions on Architecture and Code Optimization (TACO), v.5 n.2, p.1-33, August 2008
Zeshan Chishti , T. N. Vijaykumar, Optimal Power/Performance Pipeline Depth for SMT in Scaled Technologies, IEEE Transactions on Computers, v.57 n.1, p.69-81, January 2008
Qiong Cai , José González , Ryan Rakvic , Grigorios Magklis , Pedro Chaparro , Antonio González, Meeting points: using thread criticality to adapt multicore hardware to parallel regions, Proceedings of the 17th international conference on Parallel architectures and compilation techniques, October 25-29, 2008, Toronto, Ontario, Canada
José González , Qiong Cai , Pedro Chaparro , Grigorios Magklis , Ryan Rakvic , Antonio González, Thread fusion, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Young-Hwan Park , Sudeep Pasricha , Fadi J. Kurdahi , Nikil Dutt, Methodology for multi-granularity embedded processor power model generation for an ESL design flow, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
Yu Sun , Wei Zhang, Efficient code caching to improve performance and energy consumption for java applications, Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, October 19-24, 2008, Atlanta, GA, USA
Yun Liang , Lei Ju , Samarjit Chakraborty , Tulika Mitra , Abhik Roychoudhury, Cache-aware optimization of BAN applications, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
Abhishek Bhattacharjee , Gilberto Contreras , Margaret Martonosi, Full-system chip multiprocessor power evaluations using FPGA-based emulation, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Swaroop Ghosh , Jung-Hwan Choi , Patrick Ndai , Kaushik Roy, O2C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Michael Kadin , Sherief Reda, Frequency planning for multi-core processors under thermal constraints, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India
Yuki Kobayashi , Murali Jayapala , Praveen Raghavan , Francky Catthoor , Masaharu Imai, Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, v.E91-A n.2, p.604-612, February 2008
F. Castro , D. Chaver , L. Pinuel , M. Prieto , F. Tirado, Using age registers for a simple load-store queue filtering, Journal of Systems Architecture: the EUROMICRO Journal, v.55 n.2, p.79-89, February, 2009
Michael B. Healy , Hsien-Hsin S. Lee , Gabriel H. Loh , Sung Kyu Lim, Thermal optimization in multi-granularity multi-core floorplanning, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
Yu-Lai Zhao , Xian-Feng Li , Dong Tong , Xu Cheng, An energy-efficient instruction scheduler design with two-level shelving and adaptive banking, Journal of Computer Science and Technology, v.22 n.1, p.15-24, January 2007
Eric Karl , David Blaauw , Dennis Sylvester , Trevor Mudge, Multi-mechanism reliability modeling and management in dynamic systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.16 n.4, p.476-487, April 2008
Vassos Soteriou , Noel Eisley , Hangsheng Wang , Bin Li , Li-Shiuan Peh, Polaris: a system-level roadmapping toolchain for on-chip interconnection networks, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.15 n.8, p.855-868, August 2007
Smruti Sarangi , Brian Greskamp , Abhishek Tiwari , Josep Torrellas, EVAL: Utilizing processors with variation-induced timing errors, Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture, p.423-434, November 08-12, 2008
Ramazan Bitirgen , Engin Ipek , Jose F. Martinez, Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach, Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture, p.318-329, November 08-12, 2008
Abhishek Tiwari , Josep Torrellas, Facelift: Hiding and slowing down aging in multicores, Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture, p.129-140, November 08-12, 2008
Xin Fu , Tao Li , Jose Fortes, NBTI tolerant microarchitecture design in the presence of process variation, Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture, p.399-410, November 08-12, 2008
Karthik Ramani , Christiaan P. Gribble , Al Davis, StreamRay: a stream filtering architecture for coherent ray tracing, ACM SIGPLAN Notices, v.44 n.3, March 2009
Ramkumar Jayaseelan , Tulika Mitra, Temperature aware task sequencing and voltage scaling, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
Srinath Sridharan , Michael DeBole , Guangyu Sun , Yuan Xie , Vijaykrishnan Narayanan, A criticality-driven microarchitectural three dimensional (3D) floorplanner, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
Arpad Gellert , Adrian Florea , Lucian Vintan, Exploiting selective instruction reuse and value prediction in a superscalar architecture, Journal of Systems Architecture: the EUROMICRO Journal, v.55 n.3, p.188-195, March, 2009
Mafijul Md. Islam , Per Stenstrom, Zero loads: canceling load requests by tracking zero values, Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture, p.16-23, October 26-26, 2008, Toronto, Canada
Eric Cheung , Harry Hsieh , Felice Balarin, Memory subsystem simulation in software TLM/T models, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
Worawan Marurngsith , Roland N. Ibbett, DSiMCluster: A Simulation Model for Efficient Memory Analysis Experiments of DSM Clusters, Simulation, v.85 n.6, p.355-374, June 2009
Marius Marcu , Dacian Tudor , Horatiu Moldovan , Sebastian Fuicu , Mircea Popa, Energy characterization of mobile devices and applications using power-thermal benchmarks, Microelectronics Journal, v.40 n.7, p.1141-1153, July, 2009
Praveen Raghavan , Murali Jayapala , Andy Lambrechts , Javed Absar , Francky Catthoor, Playing the trade-off game: Architecture exploration using Coffeee, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.3, p.1-37, May 2009
Omer Khan , Sandip Kundu, A framework for predictive dynamic temperature management of microprocessor systems, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
Faheem Sheikh , Shahid Masud , Rehan Ahmed, Superscalar architecture design for high performance DSP operations, Microprocessors & Microsystems, v.33 n.2, p.154-160, March, 2009
Taylan Yemliha , Shekhar Srikantaiah , Mahmut Kandemir , Mustafa Karakoy , Mary Jane Irwin, Integrated code and data placement in two-dimensional mesh based chip multiprocessors, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
Stephen Roderick Hines , Yuval Peress , Peter Gavin , David Whalley , Gary Tyson, Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE), ACM SIGPLAN Notices, v.44 n.7, July 2009
Michael Kadin , Sherief Reda , Augustus Uht, Central vs. distributed dynamic thermal management for multi-core processors: which one is better?, Proceedings of the 19th ACM Great Lakes symposium on VLSI, May 10-12, 2009, Boston Area, MA, USA
Jun Yao , Shinobu Miwa , Hajime Shimada , Shinji Tomita, A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases, IEICE - Transactions on Information and Systems, v.E91-D n.4, p.1010-1022, April 2008
Farhad Mehdipour , Hamid Noori , Morteza Saheb Zamani , Koji Inoue , Kazuaki Murakami, Improving Performance and Energy Saving in a Reconfigurable Processor via Accelerating Control Data Flow Graphs, IEICE - Transactions on Information and Systems, v.E90-D n.12, p.1956-1966, December 2007
Richard Strong , Jayaram Mudigonda , Jeffrey C. Mogul , Nathan Binkert , Dean Tullsen, Fast switching of threads between cores, ACM SIGOPS Operating Systems Review, v.43 n.2, April 2009
Praveen Raghavan , Andy Lambrechts , Murali Jayapala , Francky Catthoor , Diederik Verkest, EMPIRE: Empirical power/area/timing models for register files, Microprocessors & Microsystems, v.33 n.4, p.295-300, June, 2009
Marius Marcu , Dacian Tudor , Sebastian Fuicu, Towards a network-device unified framework for power-aware wireless applications, Proceedings of the 2009 International Conference on Wireless Communications and Mobile Computing: Connecting the World Wirelessly, June 21-24, 2009, Leipzig, Germany
Mikael Collin , Mats Brorsson, Two-Level Dictionary Code Compression: A New Scheme to Improve Instruction Code Density of Embedded Applications, Proceedings of the 2009 International Symposium on Code Generation and Optimization, p.231-242, March 22-25, 2009
Yefu Wang , Kai Ma , Xiaorui Wang, Temperature-constrained power control for chip multiprocessors with online model estimation, ACM SIGARCH Computer Architecture News, v.37 n.3, June 2009
Yang Ding , Mahmut Kandemir , Padma Raghavan , Mary Jane Irwin, Adapting application execution in CMPs using helper threads, Journal of Parallel and Distributed Computing, v.69 n.9, p.790-806, September, 2009
Jinho Suh , Michel Dubois, Dynamic MIPS rate stabilization in out-of-order processors, ACM SIGARCH Computer Architecture News, v.37 n.3, June 2009
Demid Borodin , B. H. Juurlink , Said Hamdioui , Stamatis Vassiliadis, Instruction-Level Fault Tolerance Configurability, Journal of Signal Processing Systems, v.57 n.1, p.89-105, October 2009
D. Novo , T. Schuster , B. Bougard , A. Lambrechts , L. Perre , F. Catthoor, Energy-performance Exploration of a CGA-based SDR Processor, Journal of Signal Processing Systems, v.56 n.2-3, p.273-284, September 2009
Jose Renau , Karin Strauss , Luis Ceze , Wei Liu , Smruti R. Sarangi , James Tuck , Josep Torrellas, Energy-Efficient Thread-Level Speculation, IEEE Micro, v.26 n.1, p.80-91, January 2006
Ayse K. Coskun , Richard Strong , Dean M. Tullsen , Tajana Simunic Rosing, Evaluating the impact of job scheduling and power management on processor lifetime for chip multiprocessors, Proceedings of the eleventh international joint conference on Measurement and modeling of computer systems, June 15-19, 2009, Seattle, WA, USA
Doosan Cho , Sudeep Pasricha , Ilya Issenin , Nikil D. Dutt , Minwook Ahn , Yunheung Paek, Adaptive scratch pad memory management for dynamic behavior of multimedia applications, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.28 n.4, p.554-567, April 2009
Zyad Hassan , Nicholas Allec , Li Shang , Robert P. Dick , Vishak Venkatraman , Ronggui Yang, Multiscale thermal analysis for nanometer-scale integrated circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.28 n.6, p.860-873, June 2009
Ozcan Ozturk , Mahmut Kandemir , Mary Jane Irwin, Using data compression for increasing memory system utilization, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.28 n.6, p.901-914, June 2009
Karan Singh , Major Bhadauria , Sally A. McKee, Real time power estimation and thread scheduling via performance counters, ACM SIGARCH Computer Architecture News, v.37 n.2, May 2009
Zoltán Herczeg , Daniel Schmidt , Ákos Kiss , Norbert Wehn , Tibor Gyimóthy, Energy simulation of embedded XScale systems with XEEMU, Journal of Embedded Computing, v.3 n.3, p.209-219, August 2009
Joshua J. Yi , David J. Lilja, Simulation of Computer Architectures: Simulators, Benchmarks, Methodologies, and Recommendations, IEEE Transactions on Computers, v.55 n.3, p.268-280, March 2006

INDEX TERMS

Primary Classification:
  B. Hardware
  B.2 ARITHMETIC AND LOGIC STRUCTURES

Additional Classification:
  B. Hardware
  B.3 MEMORY STRUCTURES


General Terms:
Design, Experimentation, Measurement, Theory

Collaborative Colleagues:
David Brooks: colleagues
Vivek Tiwari: colleagues
Margaret Martonosi: colleagues
This Article has also been published in:

The ACM Portal is published by the Association for Computing Machinery. Copyright © 2009 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player