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Scheduling techniques for reducing processor energy use in MacOS
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Source Wireless Networks archive
Volume 3 ,  Issue 5  (October 1997) table of contents
Special issue: mobile computing and networking: selected papers from MobiCom '96
Pages: 311 - 324  
Year of Publication: 1997
ISSN:1022-0038
Authors
Jacob R. Lorch  Computer Science Division, EECS Department, UC Berkeley, Berkeley, CA
Alan Jay Smith  Computer Science Division, EECS Department, UC Berkeley, Berkeley, CA
Publisher
Kluwer Academic Publishers  Hingham, MA, USA
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Downloads (6 Weeks): 4,   Downloads (12 Months): 38,   Citation Count: 15
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DOI Bookmark: 10.1023/A:1019177822227

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ABSTRACT

The CPU is one of the major power consumers in a portable computer, and considerable power can be saved by turning off the CPU when it is not doing useful work. In Apple's MacOS, however, idle time is often converted to busy waiting, and generally it is very hard to tell when no useful computation is occurring. In this paper, we suggest several heuristic techniques for identifying this condition, and for temporarily putting the CPU in a low-power state. These techniques include turning off the processor when all processes are blocked, turning off the processor when processes appear to be busy waiting, and extending real time process sleep periods. We use trace-driven simulation, using processor run interval traces, to evaluate the potential energy savings and performance impact. We find that these techniques save considerable amounts of processor energy (as much as 66%), while having very little performance impact (less than 2% increase in run time). Implementing the proposed strategies should increase battery lifetime by approximately 20% relative to Apple's current CPU power management strategy, since the CPU and associated logic are responsible for about 32% of power use; similar techniques should be applicable to operating systems with similar behavior.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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J. Conger, Windows API Bible (Waite Group Press, Corte Madera, CA, 1992).
 
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F. Douglis, P. Krishnan and B. Marsh, Thwarting the power-hungry disk, in: Proceedings of the 1994 Winter USENIX Conference, San Francisco, CA (1994) pp. 293-306.
 
4
S. Gary, C. Dietz, J. Eno, G. Gerosa, S. Park and H. Sanchez, The PowerPC TM 603 microprocessor: a low-power design for portable applications, in: Proceedings of the IEEE International Computer Society Conference, San Francisco, CA (1994) pp. 307-315.
 
5
R. Jain, The Art of Computer Systems Performance Analysis: Techniques for Experimental Design, Measurement, Simulation, and Modeling (Wiley, New York, NY, 1991).
 
6
G. Keppel and S. Zedeck, Data Analysis for Research Designs: Analysis of Variance and Multiple Regression/Correlation Approaches (Freeman, New York, NY, 1989).
 
7
K. Li, R. Kumpf, P. Horton and T. Anderson, A quantitative analysis of disk drive power management in portable computers, in: Proceedings of the 1994 Winter USENIX Conference (1994) pp. 279-291.
 
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J. Lorch, Modeling the effect of different processor cycling techniques on power consumption, Report 179, Performance Evaluation Group, ATG Integrated Systems, Apple Computer, Inc., Cupertino, CA (1995).
 
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J. Lorch, A complete picture of the energy consumption of a portable computer, Masters Thesis, Computer Science, University of California at Berkeley (1995).
 
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J. Lorch and A.J. Smith, How energy is consumed and saved in portable computers, in preparation, 1996.
 
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M. Pietrek, Windows Internals (Addison-Wesley, Reading, MA, 1993).
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P. Sohn, SETC: A System Event Tracer and Counter, Performance Evaluation Group, ATG Integrated Systems, Apple Computer, Inc., Cupertino, CA (1994).
 
15
16
 
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N. Suzuki and S. Uno, Information Processing System Having Power Saving Control of the Processor Clock, United States Patent #5,189,647 (1993).

CITED BY  15

Collaborative Colleagues:
Jacob R. Lorch: colleagues
Alan Jay Smith: colleagues