A VLSI artwork legalization technique based on a new criterion of minimum layout perturbation

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A VLSI artwork legalization technique based on a new criterion of minimum layout perturbation

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International Symposium on Physical Design archive
Proceedings of the 1997 international symposium on Physical design table of contents

Napa Valley, California, United States

Pages: 116 - 121

Year of Publication: 1997

ISBN:0-89791-927-0

Authors

Fook-Luen Heng	IBM Corporation, 32-138, T.J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY
Zhan Chen	Dept. of ECE, Univ. of Massachusetts, Amherst, MA
Gustavo E. Tellez	IBM Corporation, 32-138, T.J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 18, Citation Count: 6

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	David G. Boyer, Symbolic layout compaction review, Proceedings of the 25th ACM/IEEE conference on Design automation, p.383-389, June 12-15, 1988, Atlantic City, New Jersey, United States
	2	Thomas Lengauer, Combinatorial algorithms for integrated circuit layout, John Wiley & Sons, Inc., New York, NY, 1990
	3	Sching L. Lin , Jonathan Allen, Minplex—a compactor that minimizes the bounding rectangle and individual rectangles in a layout, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.123-130, July 1986, Las Vegas, Nevada, United States
	4	Lee, J. E and Wong, C. K. "A Performance-Aimed Cell Compactor with Automatic Jogs" IEEE Transactions on Computer didedDesign, Volume CAD-II, Number 12, December 1992. pp. 1495-1507.
	5	IBM Optimization Subroutine Library, Guide and Reference, Release 2. SC23-0519-03.
	6	Tellez, G. and Sarraf~deh M. "A Graph-Based Delay Budgeting Algorithm for Large Scale Timing-Driven Placement Problems': Proceedings of the 5th ACM/SIGDA Physical Design Workshop. April, 1996. pp. 234-240.
	7	Cyrus Bamji , Enrico Malavasi, Enhanced network flow algorithm for yield optimization, Proceedings of the 33rd annual conference on Design automation, p.746-751, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240660]
	8	Dong, S. K., and Pan, P. and Lo, C. Y. and Liu C. L. "Constraint Relaxation in Graph-Based Compaction". Proceedings of the 5th ACM/SIGDA Physical Design Workshop. April, 1996. pp. 256-261.
	9	Ravindra K. Ahuja , Thomas L. Magnanti , James B. Orlin, Network flows: theory, algorithms, and applications, Prentice-Hall, Inc., Upper Saddle River, NJ, 1993
	10	Kedem, G., and Watanabe H. "Graph-Optimization Techniques for IC Layout and Compaction", 1EEE Transaction on Computer Aided Design, VoL CAD-3, NO. 1, January 1984. pp. 12-19.
	11	Christos H. Papadimitriou, Kenneth Steiglitz. "Combinatorial Optimization Algrorithms and Complexity". Prentice- Hall, Inc. pp 316-318,

CITED BY 6

	Fook-Luen Heng , Lars Liebmann , Jennifer Lund, Application of automated design migration to alternating phase shift mask design, Proceedings of the 2001 international symposium on Physical design, p.38-43, April 01-04, 2001, Sonoma, California, United States
	Alexey Lvov , Fook-Luen Heng, A graph based simplex method for the integer minimum perturbation problem with sum and difference constraints, Proceedings of the 14th ACM Great Lakes symposium on VLSI, April 26-28, 2004, Boston, MA, USA
	Fang Fang , Jianwen Zhu, Automatic process migration of datapath hard IP libraries, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.887-892, January 27-30, 2004, Yokohama, Japan
	Xin Yuan , Kevin W. McCullen , Fook-Luen Heng , Robert F. Walker , Jason Hibbeler , Robert J. Allen , Rani R. Narayan, Technology migration technique for designs with strong RET-driven layout restrictions, Proceedings of the 2005 international symposium on Physical design, April 03-06, 2005, San Francisco, California, USA
	Xiaoping Tang , Xin Yuan , Michael S. Gray, Practical method for obtaining a feasible integer solution in hierarchical layout optimization, Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, November 05-08, 2007, San Jose, California
	Xiaoping Tang , Xin Yuan, Technology migration techniques for simplified layouts with restrictive design rules, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California