Low-power digital systems based on adiabatic-switching principles

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Low-power digital systems based on adiabatic-switching principles

Source

IEEE Transactions on Very Large Scale Integration (VLSI) Systems archive
Volume 2 , Issue 4 (December 1994) table of contents
Special issue on low-power design

Pages: 398 - 407

Year of Publication: 1994

ISSN:1063-8210

Authors

William C. Athas
Lars J. Svensson
Jeffrey G. Koller
Nestoras Tzartzanis
Eric Ying-Chin Chou

Publisher

IEEE Educational Activities Department Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Citation Count: 48

Additional Information:

cited by index terms collaborative colleagues

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DOI Bookmark:	10.1109/92.335009

CITED BY 48

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	Dragan Maksimović , Vojin G. Oklobdžija , Borivoje Nikolic , K. Wayne Current, Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results, Proceedings of the 1997 international symposium on Low power electronics and design, p.323-327, August 18-20, 1997, Monterey, California, United States
	Hendrawan Soeleman , Kaushik Roy, Digital CMOS logic operation in the sub-threshold region, Proceedings of the 10th Great Lakes symposium on VLSI, p.107-112, March 02-04, 2000, Chicago, Illinois, United States
	Massimo Alioto , Gaetano Palumbo, Power estimation in adiabatic circuits: a simple and accurate model, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.5, p.608-615, October 2001
	Hendrawan Soeleman , Kaushik Roy, Ultra-low power digital subthreshold logic circuits, Proceedings of the 1999 international symposium on Low power electronics and design, p.94-96, August 16-17, 1999, San Diego, California, United States
	Suhwan Kim , Marios C. Papaefthymiou, Single-phase source-coupled adiabatic logic, Proceedings of the 1999 international symposium on Low power electronics and design, p.97-99, August 16-17, 1999, San Diego, California, United States
	Suhwan Kim , Marios C. Papaefthymiou, True single-phase energy-recovering logic for low-power, high-speed VLSI, Proceedings of the 1998 international symposium on Low power electronics and design, p.167-172, August 10-12, 1998, Monterey, California, United States
	Suhwan Kim , Conrad H. Ziesler , Marios C. Papaefthymiou, A true single-phase 8-bit adiabatic multiplier, Proceedings of the 38th conference on Design automation, p.758-763, June 2001, Las Vegas, Nevada, United States
	Massoud Pedram, Power minimization in IC design: principles and applications, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.1 n.1, p.3-56, Jan. 1996
	Stephan Avery , Marwan Jabri, A three-port adiabatic register file suitable for embedded applications, Proceedings of the 1998 international symposium on Low power electronics and design, p.288-292, August 10-12, 1998, Monterey, California, United States
	Nestoras Tzartzanis , William Athas, Retractile clock-powered logic, Proceedings of the 1999 international symposium on Low power electronics and design, p.18-23, August 16-17, 1999, San Diego, California, United States
	David J. Frank , Paul M. Solomon, Electroid-oriented adiabatic switching circuits, Proceedings of the 1995 international symposium on Low power design, p.197-202, April 23-26, 1995, Dana Point, California, United States
	A. Schlaffer , J. A. Nossek, Enhanced prediction of energy losses during adiabatic charging, Proceedings of the 1997 international symposium on Low power electronics and design, p.104-107, August 18-20, 1997, Monterey, California, United States
	Aiyappan Natarajan , David Jasinski , Wayne Burleson , Russell Tessier, A hybrid adiabatic content addressable memory for ultra low-power applications, Proceedings of the 13th ACM Great Lakes symposium on VLSI, April 28-29, 2003, Washington, D. C., USA
	N. Shanbhag, Lower bounds on power dissipation for DSP algorithms, Proceedings of the 1996 international symposium on Low power electronics and design, p.43-48, August 12-14, 1996, Monterey, California, United States
	D. Frank, Comparison of high speed voltage-scaled conventional and adiabatic circuits, Proceedings of the 1996 international symposium on Low power electronics and design, p.377-380, August 12-14, 1996, Monterey, California, United States
	Jun-Ho Kwon , Joonho Lim , Soo-Ik Chae, A three-port nRERL register file for ultra-low-energy applications, Proceedings of the 2000 international symposium on Low power electronics and design, p.161-166, July 25-27, 2000, Rapallo, Italy
	Joong-Seok Moon , William C. Athas , Sigfrid D. Soli , Jeffrey T. Draper , Peter A. Beerel, Voltage-pulse driven harmonic resonant rail drivers for low-power applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.5, p.762-777, October 2003
	Massoud Pedram , Xunwei Wu, Analysis of power-clocked CMOS with application to the design of energy-recovery circuits, Proceedings of the 2000 conference on Asia South Pacific design automation, p.339-344, January 2000, Yokohama, Japan
	Aryan Saèd , Majid Ahmadi , Graham A. Jullien, A Number System with Continuous Valued Digits and Modulo Arithmetic, IEEE Transactions on Computers, v.51 n.11, p.1294-1305, November 2002
	W. Athas , N. Tzartzanis , L. Svensson , L. Peterson , H. Li , X. Jiang , P. Wang , W-C. Liu, AC-1: a clock-powered microprocessor, Proceedings of the 1997 international symposium on Low power electronics and design, p.328-333, August 18-20, 1997, Monterey, California, United States
	Conrad H. Ziesler , Suhwan Kim , Marios Papaefthymiou, A resonant clock generator for single-phase adiabatic systems, Proceedings of the 2001 international symposium on Low power electronics and design, p.159-164, August 2001, Huntington Beach, California, United States
	Dusan Suvakovic , C. Andre T. Salama, Energy Efficient Adiabatic Multiplier-Accumulator Design, Journal of VLSI Signal Processing Systems, v.33 n.1, p.83-21, January-February 2003
	Conrad H. Ziesler , Joohee Kim , Visvesh S. Sathe , Marios C. Papaefthymiou, A 225 MHz resonant clocked ASIC chip, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
	Suhwan Kim , Conrad H. Ziesler , Marios C. Papaefthymiou, A true single-phase energy-recovery multiplier, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.2, p.194-207, April 2003
	Baohua Wang , Pinaki Mazumder, On optimality of adiabatic switching in MOS energy-recovery circuit, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
	Massimo Alioto , Gaetano Palumbo , Massimo Poli, Evaluation of energy consumption in RC ladder circuits driven by a ramp input, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.10, p.1094-1107, October 2004
	Baohua Wang , Pinaki Mazumder, On optimality of adiabatic switching in MOS energy-recovery circuit, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
	Antonio Blotti , Roberto Saletti, Ultralow-power adiabatic circuit semi-custom design, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.11, p.1248-1253, November 2004
	Matthew Cooke , Hamid Mahmoodi , Qikai Chen , Kaushik Roy, Energy recovery clocked dynamic logic, Proceedings of the 15th ACM Great Lakes symposium on VLSI, April 17-19, 2005, Chicago, Illinois, USA
	Michael P. Frank, Introduction to reversible computing: motivation, progress, and challenges, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
	Suhwan Kim , Conrad H. Ziesler , Marios C. Papaefthymiou, Charge-Recovery Computing on Silicon, IEEE Transactions on Computers, v.54 n.6, p.651-659, June 2005
	Seokkee Kim , Soo-Ik Chae, Implementation of a simple 8-bit microprocessor with reversible energy recovery logic, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
	Baohua Wang , Pinaki Mazumder, Optimization of circuit trajectories: an auxiliary network approach, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
	Michael J. Flynn , Patrick Hung, Microprocessor Design Issues: Thoughts on the Road Ahead, IEEE Micro, v.25 n.3, p.16-31, May 2005
	Jouko Marjonen , Markku Åberg, A Single Clocked Adiabatic Static Logic—A Proposal for Digital Low Power Applications, Journal of VLSI Signal Processing Systems, v.27 n.3, p.253-268, March 1, 2001
	Matthew Cooke , Hamid Mahmoodi-Meimand , Kaushik Roy, Energy recovery clocking scheme and flip-flops for ultra low-energy applications, Proceedings of the 2003 international symposium on Low power electronics and design, August 25-27, 2003, Seoul, Korea
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	Anand Paul , A. Ebenezer Jeyakumar , P. N. Neelakantan , K. John Pratheep, Energy recovery strategy for low power CMOS circuits design, Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing, p.1-5, December 07-09, 2003, Singapore
	Aliakbar Ghadiri , Hamid Mahmoodi-Meimand, Comparative energy and delay of energy recovery and square wave clock flip-flops for high-performance and low-power applications, Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing, p.1-5, December 07-09, 2003, Singapore
	Ka-Ming Keung , Vineela Manne , Akhilesh Tyagi, A novel charge recycling design scheme based on adiabatic charge pump, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.15 n.7, p.733-745, July 2007
	Alberto Leporati , Claudio Zandron , Giancarlo Mauri, Reversible P Systems to Simulate Fredkin Circuits, Fundamenta Informaticae, v.74 n.4, p.529-548, December 2006
	Sheng-Tzong Cheng , Chia-Mei Chen , Jing-Wen Hwang, Low-Power Design for Real-Time Systems, Real-Time Systems, v.15 n.2, p.131-148, Sept. 1998
	S. Caufape , J. Figueras, Power Optimization of Delay Constrained CMOS Bus Drivers, Proceedings of the 1996 European conference on Design and Test, p.205, March 11-14, 1996
	Amir Moradi , Mohammad Taghi Manzuri Shalmani , Mahmoud Salmasizadeh, Dual-rail transition logic: A logic style for counteracting power analysis attacks, Computers and Electrical Engineering, v.35 n.2, p.359-369, March, 2009
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	S. E. Esmaeili , A. J. Al-Khalili , G. E. R. Cowan, A study on the effects of temperature and loading on the power consumption in energy recovery resonant clocking, Proceedings of the 2009 conference on Information Science, Technology and Applications, March 20-22, 2009, Kuwait, Kuwait
	Alireza Ejlali , Bashir M. Al-Hashimi, SEU-Hardened Energy Recovery Pipelined Interconnects for On-Chip Networks, Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip, p.67-76, April 07-10, 2008