Wire shaping is practical

ABSTRACT

Wire shaping for delay/power minimization has been extensively studied. Due to the perceived high design and manufacturing costs for using non-uniform wire shapes, wire shaping is generally considered to be impractical. In this paper, we present a practical wire shaping methodology. Non-uniform wire shapes are directly implemented on silicon wafer instead of in GDSII during design. We present novel enhancements to existing OPC technology to accurately print non-uniform wire shapes. Experimental results show that the post-OPC mask complexities of uniform wire and non-uniform wire are comparable. With minimal impact on the design and manufacturing flows and minimal additional design and manufacturing costs, we demonstrate that wire shaping can help to obtain substantial reduction of interconnect dynamic power without affecting timing closure. Our wire shaping methodology is an excellent example of Manufacturing for Design.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids

Additional Classification:
  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING
      Subjects: Computer-aided design (CAD)

General Terms:
Algorithms, Design, Performance

Keywords:
interconnect, manufacturing for design, opc, power minimization, wire tapering