| Combining dictionary coding and LFSR reseeding for test data compression |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 41st annual Design Automation Conference
table of contents
San Diego, CA, USA
SESSION: New scan-based test techniques
table of contents
Pages: 944 - 947
Year of Publication: 2004
ISBN:1-58113-828-8
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Downloads (6 Weeks): 5, Downloads (12 Months): 32, Citation Count: 0
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ABSTRACT
In this paper we describe a method to combine dictionary coding and partial LFSR reseeding to improve the ompression efficiency for test data compression. We also present a fast matrix calculation method which significantly reduces the computation time to find a solution for partial LFSR reseeding. Experimental results on ISCAS89 benchmark circuits show that our approach is better than either dictionary coding or LFSR reseeding, and outperforms several test data compression methods proposed recently.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Peter Wohl , John A. Waicukauski , Sanjay Patel , Minesh B. Amin, Efficient compression and application of deterministic patterns in a logic BIST architecture, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
[doi> 10.1145/775832.775976]
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