Design and implementation of the POWER5™ microprocessor

ABSTRACT

POWER5 offers significantly increased performance over previous POWER designs by incorporating simultaneous multithreading, an enhanced memory subsystem, and extensive RAS and power management support. The 276M transistor processor is implemented in 130nm silicon-on-insulator technology with 8-level of Cu metallization and operates at >1.5 GHz.

REFERENCES

• 1: R. Kalla, B. Sinharoy, J. Tendler, "A SMT Implementation in POWER5", Hot Chips, August 15, 2003.
• 2: P. J. Restle et al, "A Clock Distribution Method for Microprocessors", IEEE JSSC , Vol. 36, pp. 792--799, May 2001.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Advanced technologies

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Microprocessors and microcomputers; VLSI (very large scale integration)

General Terms:
Design

Keywords:
POWER5, clock gating, microprocessor design, power reduction, simultaneous multi-threading (SMT), temperature sensor