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Statistical timing analysis based on a timing yield model
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 41st annual Design Automation Conference table of contents
San Diego, CA, USA
SESSION: Yield estimation and optimization table of contents
Pages: 460 - 465  
Year of Publication: 2004
ISBN:1-58113-828-8
Authors
Farid N. Najm  University of Toronto, Toronto, ON, Canada
Noel Menezes  Intel Corporation, Hillsboro, OR
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 29,   Citation Count: 12
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ABSTRACT

Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied to estimation of the timing yield. Key features of these models are that they are easy to compute, they include a powerful model of within-die correlation, and they are "full-chip" models in the sense that they can be applied with ease to circuits with millions of components. As such, these models provide a way to do statistical timing analysis without the need for detailed statistical analysis of every path in the design.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  12

Collaborative Colleagues:
Farid N. Najm: colleagues
Noel Menezes: colleagues