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ABSTRACT
An efficient statistical timing analysis algorithm that can handle arbitrary (spatial and structural) causes of delay correlation is described. The algorithm derives the entire cumulative distribution function of the circuit delay using a new mathematical formulation. Spatial as well as structural correlations between gate and wire delays can be taken into account. The algorithm can handle node delays described by non-Gaussian distributions. Because the analytical computation of an exact cumulative distribution function for a probabilistic graph with arbitrary distributions is infeasible, we find tight upper and lower bounds on the true cumulative distribution. An efficient algorithm to compute the bounds is based on a PERT-like single traversal of the sub-graph containing the set of N deterministically longest paths. The efficiency and accuracy of the algorithm is demonstrated on a set of ISCAS'85 benchmarks. Across all the benchmarks, the average rms error between the exact distribution and lower bound is 0.7%, and the average maximum error at 95th percentile is 0.6%. The computation of bounds for the largest benchmark takes 39 seconds.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 30
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Chirayu S. Amin , Noel Menezes , Kip Killpack , Florentin Dartu , Umakanta Choudhury , Nagib Hakim , Yehea I. Ismail, Statistical static timing analysis: how simple can we get?, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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Ashish Srivastava , Saumil Shah , Kanak Agarwal , Dennis Sylvester , David Blaauw , Stephen Director, Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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Michael Orshansky , Wei-Shen Wang , Martine Ceberio , Gang Xiang, Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer chips, Proceedings of the 2006 ACM symposium on Applied computing, April 23-27, 2006, Dijon, France
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Amith Singhee , Claire F. Fang , James D. Ma , Rob A. Rutenbar, Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD tools, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
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Anand Ramalingam , Gi-Joon Nam , Ashish Kumar Singh , Michael Orshansky , Sani R. Nassif , David Z. Pan, An accurate sparse matrix based framework for statistical static timing analysis, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California
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K. Chopra , S. Shah , A. Srivastava , D. Blaauw , D. Sylvester, Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.1023-1028, November 06-10, 2005, San Jose, CA
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Sean X. Shi , Anand Ramalingam , Daifeng Wang , David Z. Pan, Latch modeling for statistical timing analysis, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
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