| Routing architecture exploration for regular fabrics |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 41st annual Design Automation Conference
table of contents
San Diego, CA, USA
SESSION: Methods for a priori feasible layout generation
table of contents
Pages: 204 - 207
Year of Publication: 2004
ISBN:1-58113-828-8
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Downloads (6 Weeks): 6, Downloads (12 Months): 28, Citation Count: 6
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ABSTRACT
In an effort to control the parameter variations and systematic yield problems that threaten the affordability of application-specific ICs, new forms of design regularity and structure have been proposed. For example, there has been speculation [6] that regular logic fabrics [1] based on regular geometry patterns [2] can offer tighter control of variations and greater control of systematic manufacturing failures. In this paper we describe a routing framework that accommodates arbitrary descriptions of regular and structured routing architectures. We further propose new regular routing architectures and explore the various performance vs. manufacturability trade-offs. Results demonstrate that a more regular, restricted routing architecture can provide a substantial advantage in terms of manufacturability and predictability while incurring a moderate performance penalty.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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L. Pileggi , H. Schmit , A. J. Strojwas , P. Gopalakrishnan , V. Kheterpal , A. Koorapaty , C. Patel , V. Rovner , K. Y. Tong, Exploring regular fabrics to optimize the performance-cost trade-off, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
[doi> 10.1145/775832.776031]
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M. Palusinski, A. J. Strojwas and W. Maly, "Regularity in Physical Design", GSRC Workshop, Las Vages, June 2001.
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A. J. Strojwas, "Process-Design Interaction Modeling Based Design For Manufacturability", Tutorial, DAC-2003.
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D.T. Blaauw et al, "Statistical Timing Analysis using Bounds and Selective Enumeration", IEEE Trans. on CAD of Integrated Circuits and Systems, Vol. 22, No.9, Sep 2003.
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B. Tyrrell et al, "Investigation of the physical and practical limits of dense-only phase shift lithography for circuit feature definition", Society of Photo-Optical Instrumentation Engineers, October-2002.
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Gonzales, Anthony J. et al, "Recent results in the application of e-beam direct-write lithography", Proc. SPIE Vol. 1089, p. 37.
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CITED BY 6
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V. Kheterpal , V. Rovner , T. G. Hersan , D. Motiani , Y. Takegawa , A. J. Strojwas , L. Pileggi, Design methodology for IC manufacturability based on regular logic-bricks, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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