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ABSTRACT

Recent efforts in adapting computer networks into system-on-chip(SOC), or network-on-chip, present a setback to the traditionalcomputer systems for the lack of effective programming model,while not taking full advantage of the almost unlimited on-chipbandwidth. In this paper, we propose a new programming model,called context-flow, that is simple, safe, highly parallelizable yettransparent to the underlying architectural details. An SOC platformarchitecture is then designed to support this programmingmodel, while fully exploiting the physical proximity between theprocessing elements. We demonstrate the performance efficiencyof this architecture over bus based and packet-switch based networksby two case studies using a multi-processor architecture simulator.

REFERENCES

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INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.2 COMPUTER-COMMUNICATION NETWORKS
      C.2.1 Network Architecture and Design
          Subjects: Network topology

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Algorithms implemented in hardware

  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.4 Parallel Architectures
          Subjects: Mobile processors

General Terms:
Algorithms, Design, Performance