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Techniques for efficient inline tracing on a shared-memory multiprocessor
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Source Joint International Conference on Measurement and Modeling of Computer Systems archive
Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems table of contents
Univ. of Colorado, Boulder, Colorado, United States
Pages: 37 - 47  
Year of Publication: 1990
ISBN:0-89791-359-0
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Authors
S. J. Eggers  Department of Computer Science and Engineering, University of Washington, Seattle, WA
David R. Keppel  Department of Computer Science and Engineering, University of Washington, Seattle, WA
Eric J. Koldinger  Department of Computer Science and Engineering, University of Washington, Seattle, WA
Henry M. Levy  Department of Computer Science and Engineering, University of Washington, Seattle, WA
Sponsor
SIGMETRICS: ACM Special Interest Group on Measurement and Evaluation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 17,   Citation Count: 39
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ABSTRACT

While much current research concerns multiprocessor design, few traces of parallel programs are available for analyzing the effect of design trade-offs. Existing trace collection methods have serious drawbacks: trap-driven methods often slow down program execution by more than 1000 times, significantly perturbing program behavior; microcode modification is faster, but the technique is neither general nor portable. This paper describes a new tool, called MPTRACE, for collecting traces of multithreaded parallel programs executing on shared-memory multiprocessors. MPTRACE requires no hardware or microcode modification; it collects complete program traces; it is portable; and it reduces execution-time dilation to less than a factor 3. MPTRACE is based on inline tracing, in which a program is automatically modified to produce trace information as it executes. We show how the use of compiler flow analysis techniques can reduce the amount of data collected and therefore the runtime dilation of the traced program. We also discuss problematic issues concerning buffering and writing of trace data on a multiprocessor.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

Agarwal et al. 86
 
Bershad et al. 88
 
Borg et al. 89
A. Borg, R. Kessler, G. Lazana, and D. W. Wall. Long address traces from RISC machines" Generation and analysis. Technical Report 89/14, Digtal Equipment Corporation Western Research Laboratory, P alo Alto, CA, September 1989.
 
Devadas & Newton 87
S. Devadas and A. Newton. Topological optimization of multiple level array logic. IEEE Transactions on Computer-Aided Design, November 1987.
Eggers & Katz 89
 
Hill 87
 
Lovett & Thakkar 88
R. Lovett and S. Thakkar. The Symmetry multiprocessory system. In Proceedings of the 1988 international Conference on Parallel Processing, pages 303-310, August 1988.
Ma et al. 87
Mellor-Crummey & LeBlanc 89
 
MIPS 86
MIPS. Languages and Programmer's Manual. MIPS Computer Systems, Inc., 1986.
Przybylski et al. 88
 
Shustek 78
Sites & Agarwal 88
Smith 82
Stunkel & Fuchs 89
Wiecek 82

CITED BY  39

Collaborative Colleagues:
S. J. Eggers: colleagues
David R. Keppel: colleagues
Eric J. Koldinger: colleagues
Henry M. Levy: colleagues