Design considerations for regular fabrics

ABSTRACT

Structured ASICs are an emerging new class of ASICs that attempt to bridge the widening gap in per-unit manufacturing costs, non recurring engineering (NRE) costs, power consumption, and performance between zero-mask programmable devices such as FPGAs and devices such as cell based ASICs, which require new custom designed masks for every ASIC. They offer an intermediate trade-off point between the two extremes of the very high per unit cost, but zero non-recurring cost of FPGAs, and the very low per unit cost, but very high non-recurring cost of cell based ASICs. They also offer a similar, intermediate trade-off point between the two extremes for performance and power consumption. A common theme across all structured ASICs is the use of a circuit fabric that has a regular, repeating pattern of elementary building blocks that can be programmed using one or more masks to implement an ASIC device. In this paper, we describe the considerations involved in designing the regular circuit fabrics underlying structured ASIC offerings.

REFERENCES

• 1: Gheewala, Tushar R. Gate Array Cell Architecture and Routing Scheme. U.S. Patent 5923059, July 1999.
• 2: Gheewala, Tushar R. Integrated Circuit Cell Architecture and Routing Scheme. U.S. Patent 5898194, April 1999.
• 3: Gheewala, Tushar R. Integrated Circuit Cell Architecture and Routing Scheme. U.S. Patent 5923059, July 1999.
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• 6: Chetan Patel , Anthony Cozzie , Herman Schmit , Larry Pileggi, An architectural exploration of via patterned gate arrays, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA [doi>10.1145/640000.640039]

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays
      B.7.2 Design Aids
          Subjects: Placement and routing

General Terms:
Design, Economics, Experimentation, Performance, Reliability

Keywords:
regular fabric, structured ASIC