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Sensitivity guided net weighting for placement driven synthesis
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Source International Symposium on Physical Design archive
Proceedings of the 2004 international symposium on Physical design table of contents
Phoenix, Arizona, USA
SESSION: Placement techniques table of contents
Pages: 10 - 17  
Year of Publication: 2004
ISBN:1-58113-817-2
Authors
Haoxing Ren  UT Austin & IBM Corporation, Austin, TX
David Z. Pan  University of Texas at Austin, Austin, TX
David S. Kung  IBM T.J. Watson Research Center, Yorktown Heights, NY
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 5,   Downloads (12 Months): 18,   Citation Count: 9
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ABSTRACT

Net weighting is a key technique in large scale timing driven placement, which plays a crucial role for deep submicron physical synthesis and timing closure. A popular way to assign net weight is based on the slack of the nets, trying to minimize the worst negative slack (WNS) for the entire circuit. While WNS is an important optimization metric, another figure of merit (FOM), defined as the total slack difference compared to a certain slack threshold for all timing end points, is of equivalent importance to measure the overall timing closure result for highly complex modern ASIC and microprocessor designs. In this paper, we perform a comprehensive analysis of the slack and FOM sensitivities to the net weight, and propose a new net weighting scheme based on the slack and FOM sensitivities. Such sensitivity analysis implicitly takes potential physical synthesis effect into consideration. Experiment results on a set of industrial circuits are promising for both stand-alone timing driven placement and physical synthesis afterwards.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Semiconductor Industry Association, International Technology Roadmap for Semiconductors, 2003, http://public.itrs.net/.
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CITED BY  10

Collaborative Colleagues:
Haoxing Ren: colleagues
David Z. Pan: colleagues
David S. Kung: colleagues