Analysis of multithreaded architectures for parallel computing

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Analysis of multithreaded architectures for parallel computing

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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the second annual ACM symposium on Parallel algorithms and architectures table of contents

Island of Crete, Greece

Pages: 169 - 178

Year of Publication: 1990

ISBN:0-89791-370-1

Authors

R. Saavedra-Barrera	Computer Science Division, University of California, Berkeley, California
D. Culler	Computer Science Division, University of California, Berkeley, California
T. von Eicken	Computer Science Division, University of California, Berkeley, California

Sponsors

IEEE-CS : Computer Society
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture
CTI : Computer Technology Inst.
EATCS : European Association for Theoretical Computer Science
Computer Tech Inst. : Computer Technology Institute

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 50, Citation Count: 22

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	Ande67	Anderson, D.W., Sparacio, F.J., and Tomasulo, R.M., "The IBM System/360 Model 91: Machine Philosophy and Instruction-Handling". IBM Journal, Vol.9, No.25, January 1967, pp. 8-24.
	Arga88	A. Agarwal , R. Simoni , J. Hennessy , M. Horowitz, An evaluation of directory schemes for cache coherence, Proceedings of the 15th Annual International Symposium on Computer architecture, p.280-298, May 30-June 02, 1988, Honolulu, Hawaii, United States
	Arga89	A. Agarwal , J. Hennessy , M. Horowitz, An analytical cache model, ACM Transactions on Computer Systems (TOCS), v.7 n.2, p.184-215, May 1989 [doi>10.1145/63404.63407]
	Arvi87	Arvind , Robert A. Iannucci, Two fundamental issues in multiprocessing, 4th International DFVLR Seminar on Foundations of Engineering Sciences on Parallel Computing in Science and Engineering, p.61-88, April 1988, Bonn, Germany
	Arvi88	Arvind, Culler, D.E., and Maa, G.K., "Assessing the Benefits of Fine-Grain Parallelism in Dataflow Programs". The International Journal of Supercomputer Applications, Vol.2, No.3, November 1988.
	Clar83	Douglas W. Clark, Cache Performance in the VAX-11/780, ACM Transactions on Computer Systems (TOCS), v.1 n.1, p.24-37, Feb. 1983 [doi>10.1145/357353.357356]
	Egge88	S. J. Eggers , R. H. Katz, A characterization of sharing in parallel programs and its application to coherency protocol evaluation, Proceedings of the 15th Annual International Symposium on Computer architecture, p.373-382, May 30-June 02, 1988, Honolulu, Hawaii, United States
	Good83	James R. Goodman, Using cache memory to reduce processor-memory traffic, Proceedings of the 10th annual international symposium on Computer architecture, p.124-131, June 13-17, 1983, Stockholm, Sweden
	Hals88	R. H. Halstead, Jr. , T. Fujita, MASA: a multithreaded processor architecture for parallel symbolic computing, Proceedings of the 15th Annual International Symposium on Computer architecture, p.443-451, May 30-June 02, 1988, Honolulu, Hawaii, United States
	Ianu88	R. A. Iannucci, Toward a dataflow/von Neumann hybrid architecture, Proceedings of the 15th Annual International Symposium on Computer architecture, p.131-140, May 30-June 02, 1988, Honolulu, Hawaii, United States
	Nikh88	R. S. Nikhil, Can dataflow subsume von Neumann computing?, Proceedings of the 16th annual international symposium on Computer architecture, p.262-272, April 1989, Jerusalem, Israel
	Russ78	Richard M. Russell, The CRAY-1 computer system, Communications of the ACM, v.21 n.1, p.63-72, Jan. 1978 [doi>10.1145/359327.359336]
	Saav90	Rafael H. Saavedra-Barrera , David E. Culler, An Analytical Solution for a Markov Chain Modeling Multithreaded, University of California at Berkeley, Berkeley, CA, 1991
	Smit82	Alan Jay Smith, Cache Memories, ACM Computing Surveys (CSUR), v.14 n.3, p.473-530, Sept. 1982 [doi>10.1145/356887.356892]
	Smit78	Smith, B.J., "A Pipelined, Shared Resource MIMD Computer". 1978 Int. Conf. on Parallel Proc., 1978, pp. 6-8.
	Thie89	Dominique Thiébaut, On the Fractal Dimension of Computer Programs and its Application to the Prediction of the Cache Miss Ratio, IEEE Transactions on Computers, v.38 n.7, p.1012-1026, July 1989 [doi>10.1109/12.30852]
	This88	M. R. Thistle , B. J. Smith, A processor architecture for horizon, Proceedings of the 1988 ACM/IEEE conference on Supercomputing, p.35-41, November 12-17, 1988, Orlando, Florida, United States
	Webe89	W.-D. Weber , A. Gupta, Exploring the benefits of multiple hardware contexts in a multiprocessor architecture: preliminary results, Proceedings of the 16th annual international symposium on Computer architecture, p.273-280, April 1989, Jerusalem, Israel

CITED BY 22

	Dean M. Tullsen , Susan J. Eggers , Henry M. Levy, Simultaneous multithreading: maximizing on-chip parallelism, ACM SIGARCH Computer Architecture News, v.23 n.2, p.392-403, May 1995
	Dean M. Tullsen , Jeffery A. Brown, Handling long-latency loads in a simultaneous multithreading processor, Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, December 01-05, 2001, Austin, Texas
	Beng-Hong Lim , Ricardo Bianchini, Limits on the performance benefits of multithreading and prefetching, ACM SIGMETRICS Performance Evaluation Review, v.24 n.1, p.37-46, May 1996
	Carl A. Waldspurger , William E. Weihl, Register relocation: flexible contexts for multithreading, ACM SIGARCH Computer Architecture News, v.21 n.2, p.120-130, May 1993
	Jack L. Lo , Joel S. Emer , Henry M. Levy , Rebecca L. Stamm , Dean M. Tullsen , S. J. Eggers, Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading, ACM Transactions on Computer Systems (TOCS), v.15 n.3, p.322-354, Aug. 1997
	Bob Boothe , Abhiram Ranade, Improved multithreading techniques for hiding communication latency in multiprocessors, ACM SIGARCH Computer Architecture News, v.20 n.2, p.214-223, May 1992
	Luis André Barroso , Michel Dubois, The performance of cache-coherent ring-based multiprocessors, ACM SIGARCH Computer Architecture News, v.21 n.2, p.268-277, May 1993
	R. Thekkath , S. J. Eggers, Impact of sharing-based thread placement on multithreaded architectures, ACM SIGARCH Computer Architecture News, v.22 n.2, p.176-186, April 1994
	Radhika Thekkath , Susan J. Eggers, The effectiveness of multiple hardware contexts, ACM SIGPLAN Notices, v.29 n.11, p.328-337, Nov. 1994
	Dean M. Tullsen , Susan J. Eggers , Henry M. Levy, Simultaneous multithreading: maximizing on-chip parallelism, 25 years of the international symposia on Computer architecture (selected papers), p.533-544, June 27-July 02, 1998, Barcelona, Spain
	Andrew Sohn , Yuetsu Kodama , Jui Ku , Mitsuhisa Sato , Hirofumi Sakane , Hayato Yamana , Shuichi Sakai , Yoshinori Yamaguchi, Fine-grain multithreading with the EM-X multiprocessor, Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures, p.189-198, June 23-25, 1997, Newport, Rhode Island, United States
	Anoop Gupta , John Hennessy , Kourosh Gharachorloo , Todd Mowry , Wolf-Dietrich Weber, Comparative evaluation of latency reducing and tolerating techniques, ACM SIGARCH Computer Architecture News, v.19 n.3, p.254-263, May 1991
	David E. Culler , Anurag Sah , Klaus E. Schauser , Thorsten von Eicken , John Wawrzynek, Fine-grain parallelism with minimal hardware support: a compiler-controlled threaded abstract machine, ACM SIGARCH Computer Architecture News, v.19 n.2, p.164-175, Apr. 1991
	A. Agarwal, Performance Tradeoffs in Multithreaded Processors, IEEE Transactions on Parallel and Distributed Systems, v.3 n.5, p.525-539, September 1992
	Michael Dubois , Luiz André Barroso, Performance Evaluation of the Slotted Ring Multiprocessor, IEEE Transactions on Computers, v.44 n.7, p.878-890, July 1995
	Guy E. Blelloch , Phillip B. Gibbons, Effectively sharing a cache among threads, Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures, June 27-30, 2004, Barcelona, Spain
	Yong-Kim Chong , Kai Hwang, Performance Analysis of Four Memory Consistency Models for Multithreaded Multiprocessors, IEEE Transactions on Parallel and Distributed Systems, v.6 n.10, p.1085-1099, October 1995
	Andrew Sohn , Chinhyun Kim , Mitsuhisa Sato, Multithreading with the EM-4 distributed-memory multiprocessor, Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, p.27-36, June 27-29, 1995, Limassol, Cyprus
	David E. Culler , Klaus E. Schauser , Thorsten von Eicken, Two Fundamental Limits on Dataflow Multiprocessing, Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, p.153-164, January 20-22, 1993
	Eric Tune , Rakesh Kumar , Dean M. Tullsen , Brad Calder, Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy, Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture, p.183-194, December 04-08, 2004, Portland, Oregon
	Shimin Chen , Phillip B. Gibbons , Michael Kozuch , Vasileios Liaskovitis , Anastassia Ailamaki , Guy E. Blelloch , Babak Falsafi , Limor Fix , Nikos Hardavellas , Todd C. Mowry , Chris Wilkerson, Scheduling threads for constructive cache sharing on CMPs, Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures, June 09-11, 2007, San Diego, California, USA
	Ed Upchurch , Thomas Sterling , Jay Brockman, Analysis and Modeling of Advanced PIM Architecture Design Tradeoffs, Proceedings of the 2004 ACM/IEEE conference on Supercomputing, p.12, November 06-12, 2004