Roving testing using new built-in-self-tester designs for FPGAs

ABSTRACT

We propose a roving tester (ROTE) that tests the PLBs of the FPGA by periodically moving across it. At any time, the ROTE occupies a certain area of the FPGA, say two columns, and tests all PLBs in that area using parallel built-in self-tester (BISTers). A significant contribution of this work are designs for 1- and 2-diagnosable BISTers. To the best of our knowledge, this is the first time that BISTer designs with provable diagnosabilities have been developed for FPGAs. We also develop functionality-specific testing methods that test PLBs in only two circuit functions that will be mapped to them (as opposed to testing PLBs in all their operational modes), for any reconfigurable fault pattern as the ROTE moves across the FPGA. The combination of our 1- or 2-diagnosable BISTer design and our functionality-specific testing technique leads to more accurate and faster test-and-diagnosis of FPGAs than achieved by previous work.