Dynamically reconfigurable architecture for high-throughput processing of data centric applications

ABSTRACT

This paper presents a reconfigurable platform for executing data centric applications. The proposed platform realizes applications where buffers are dominated in the design. Such characteristics of application domain is mostly exhibited by loop based processing systems. To increase the throughput, the platform is centered around buffers interacting through reconfigurable interconnect. Each buffer is associated with an autonomous reconfigurable controller where reconfiguration parameters are obtained statically from the dataflow graph. The execution concurrency is maintained by two level pipelining mechanism. We illustrate that the proposed platform is highly regular and decreases dynamic reconfiguration time significantly.