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SPFD-based one-to-many rewiring
Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays table of contents
Monterey, California, USA
POSTER SESSION: Poster abstracts table of contents
Pages: 250 - 250  
Year of Publication: 2004
ISBN:1-58113-829-6
Authors
Katsunori Tanaka  Kyoto University, Kyoto, Japan
Shigeru Yamashita  Nara Institute of Science and Technology, Ikoma, Nara, Japan
Yahiko Kambayashi  Kyoto University, Kyoto, Japan
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

This presentation gives a new SPFD-based method to make a target wire redundant with higher possibility than the previous rewiring methods. After placement and routing, we obtain or estimate how much the existing and candidate wires interferes such physical design, and thus, we find out the most critical one of the existing wires. In order to remove it, the previous methods add new input wires to only one LUT. Actually, in the context of gate/cell-based logic optimization, it is well-known that input wire addition to many gates/cells is likely to make the critical one redundant. However, in an FPGA circuit, since an LUT can realize an arbitrary function for a specified number of inputs, such wire addition has never been considered to be useful. In this presentation, we provides with an SPFD-based condition for such wire addition to improve the FPGA circuit performance. We also present several experimental results to show the effectiveness of the proposed condition.

Collaborative Colleagues:
Katsunori Tanaka: colleagues
Shigeru Yamashita: colleagues
Yahiko Kambayashi: colleagues