ACM Home Page
Please provide us with feedback. Feedback
Profit-driven uniprocessor scheduling with energy and timing constraints
Full text PdfPdf (236 KB)
Source Symposium on Applied Computing archive
Proceedings of the 2004 ACM symposium on Applied computing table of contents
Nicosia, Cyprus
SESSION: Embedded systems: applications, solutions and techniques (EMBS) table of contents
Pages: 834 - 840  
Year of Publication: 2004
ISBN:1-58113-812-1
Authors
Jian-Jia Chen  National Taiwan University, Taipei, Taiwan, ROC
Tei-Wei Kuo  National Taiwan University, Taipei, Taiwan, ROC
Chia-Lin Yang  National Taiwan University, Taipei, Taiwan, ROC
Sponsor
SIGAPP: ACM Special Interest Group on Applied Computing
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 21,   Citation Count: 4
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/967900.968072
What is a DOI?

ABSTRACT

Energy-aware scheduling has received much attention in recent years, especially for systems with serious considerations on energy consumption. While most previous work focuses on the minimization of energy consumption, this paper exploits the maximization of the entire system profit under energy and timing constraints. We propose a greedy approximation algorithm with a 2-approximation ratio. A fully polynomial time approximation scheme (FPTAS) is also proposed, which is an optimal approximation algorithm unless P = NP. For each specified amount of error tolerant to users, the approximation algorithm could provide trade-offs among the specified error, the running time, the approximation ratio, and the memory space complexity. It provides ways for system engineers to trade performance with implementation constraints.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
A. Chandrakasan, S. Sheng, and R. Broderson. Lower-power CMOS digital design. IEEE Journal of Solid-State Circuit, 27(4):473--484, 1992.
 
2
X. Fan, C. S. Ellis, and A. R. Lebeck. Synergy between power-aware memory systems and processor voltage scaling. Technical report, Duke University, November 2002.
 
3
 
4
5
 
6
 
7
8
 
9
 
10
11
 
12
 
13
M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for reduced CPU energy. In Proceedings of Symposium on Operating Systems Design and Implementation, pages 13--23, 1994.
 
14
 
15


Collaborative Colleagues:
Jian-Jia Chen: colleagues
Tei-Wei Kuo: colleagues
Chia-Lin Yang: colleagues