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Fast Path-Based Neural Branch Prediction
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Source International Symposium on Microarchitecture archive
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture table of contents
Page: 243  
Year of Publication: 2003
ISBN:0-7695-2043-X
Author
Daniel A. Jiménez  Department of Computer Science, Rutgers University, Piscataway, NJ
Sponsor
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society  Washington, DC, USA
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Downloads (6 Weeks): 27,   Downloads (12 Months): 93,   Citation Count: 11
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ABSTRACT

Microarchitectural prediction based on neural learninghas received increasing attention in recent years. However,neural prediction remains impractical because its superioraccuracy over conventional predictors is not enough to offsetthe cost imposed by its high latency. We present a newneural branch predictor that solves the problem from bothdirections: it is both more accurate and much faster thanprevious neural predictors. Our predictor improves accuracyby combining path and pattern history to overcomelimitations inherent to previous predictors. It also has muchlower latency than previous neural predictors. The result isa predictor with accuracy far superior to conventional predictorsbut with latency comparable to predictors from industrialdesigns. Our simulations show that a path-basedneural predictor improves the instructions-per-cycle (IPC)rate of an aggressively clocked microarchitecture by 16%over the original perceptron predictor.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  11