| Lattice-based memory allocation |
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International Conference on Compilers, Architecture and Synthesis for Embedded Systems
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Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
table of contents
San Jose, California, USA
SESSION: Memory hierarchy
table of contents
Pages: 298 - 308
Year of Publication: 2003
ISBN:1-58113-676-5
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Authors
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Alain Darte
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CNRS, LIP, ENS-Lyon, Lyon, France
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Rob Schreiber
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Hewlett Packard Laboratories, Palo Alto, CA
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Gilles Villard
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CNRS, LIP, ENS-Lyon, Lyon, France
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Downloads (6 Weeks): 6, Downloads (12 Months): 28, Citation Count: 9
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ABSTRACT
We investigate the problem of memory reuse, for reducing the necessary memory size, in the context of compilation of dedicated processors. Memory reuse is a well-known concept when allocating registers (i.e., scalar variables). Its (recent) extension to arrays was studied mainly by Lefebvre and Feautrier (for loop parallelization) and by Quilleré and Rajopadhye (for circuit synthesis based on recurrence equations). Both consider affine mappings of indices to data, with modulo expressions in the first and (mainly) projections in the second. We develop a mathematical framework based on (integral) critical lattices that subsumes all previous approaches and gives new insights into the problem. Our technique consists first in building an abstract representation of conflicting indices (equivalent in a multi-dimensional space to the interference graph for register allocation), then in defining an integral lattice, admissible for the set of differences of conflicting indices, used to build a valid modular allocation. We also show the link with critical lattices, successive minima, and basis reduction, and we analyze various strategies for lattice-based memory allocation.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 9
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Youcef Bouchebaba , Bruno Girodias , Gabriela Nicolescu , El Mostapha Aboulhamid , Bruno Lavigueur , Pierre Paulin, MPSoC memory optimization using program transformation, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.12 n.4, p.43-es, September 2007
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