| A flexible hierarchical 3-D module assembler |
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European Design Automation Conference
archive
Proceedings of the conference on European design automation
table of contents
Glasgow, Scotland
SESSION: Cell generators
table of contents
Pages: 124 - 128
Year of Publication: 1990
ISBN:0-8186-2024-2
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Authors
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Robi Dutta
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Digital Equipment Corporation, Hudson, Mass.
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Maurice Marks
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Digital Equipment Corporation, Hudson, Mass.
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Craig Morrissey
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Digital Equipment Corporation, Hudson, Mass.
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Ravi Rao
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Digital Equipment Corporation, Hudson, Mass.
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Lee Sapiro
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Digital Equipment Corporation, Hudson, Mass.
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IEEE Computer Society Press
Los Alamitos, CA, USA
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Downloads (6 Weeks): 1, Downloads (12 Months): 5, Citation Count: 0
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ABSTRACT
A module assembler based on a design philosophy that is different from work reported in the literature is presented. Most assemblers are targeted for a "correct by construction" approach. However, the design philosophy in a mostly handcrafted high performance, high density chip is that of "correct by verification". Our module assembler is designed with a view to supporting highly flexible layout requirements (e.g., non-slicing, 3-d) and the ability to "assemble" a netlist for comparison with the netlist extracted from the polygon level layout.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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R. Mayo, Mocha chip: A system for the graphical design of VLSI module generators, IEEE International Conference on Computer Aided Design, 1986, pp. 74--77
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W. M. Dai, T. Asano, and E. S. Kuh, Routing region definition and ordering scheme for building block layout, IEEE Transactions on CAD, Vol CAD-4, no. 3, 1985, pp. 189--197
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H. Law and J. Mosby, An intelligent composition tool for regular and semi-regular VLSI structures, IEEE International Conference on Computer Aided Design, 1985, pp. 169--171
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William Kao et al., C3: A system and methodology for the development of module generators, IEEE International Conference on Computer Aided Design, 1986, pp. 78--81
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J. K. Ousterhout, A data structuring technique for VLSI tools, IEEE Transactions on CAD, Jan. 1984, pp. 87--99
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