Design flow for hardware/software cosynthesis of a video compression system

ABSTRACT

The implementation of a cosynthesis design flow in the CASTLE system is presented. The design flow generates a synthesizable hardware description and a C, C++, or Fortran compiler for an application-oriented processor. The approach is illustrated by the design of an embedded video compression system which can be integrated into the video card of a PC. The design flow is structured as follows: First, the requirements of the application programs are analyzed. Based on these analysis results, the designer decides on the appropriate processor structure. The processor structure is entered on a block diagram level into the CASTLE system by using a schematic entry. The CASTLE system performs the processor cosynthesis based on a VHDL library of processor components. Several processor datapaths for the video compression system were synthesized to illustrate the trade-offs between flexibility and performance when designing application-oriented processors.

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