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ABSTRACT
With recent declines in the cost of semiconductor memory and the increasing need for high performance I/O disk systems, it makes sense to consider the design of large caches. In this paper, we consider the effect of caching writes. We show that cache sizes in the range of a few percent allow writes to be performed at negligible or no cost and independently of locality considerations.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 13
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R. H. Patterson , G. A. Gibson , E. Ginting , D. Stodolsky , J. Zelenka, Informed prefetching and caching, ACM SIGOPS Operating Systems Review, v.29 n.5, p.79-95, Dec. 3, 1995
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Bo Hong , Feng Wang , Scott A. Brandt , Darrell D. E. Long , Thomas J. E. Schwarz, S. J., Using MEMS-based storage in computer systems---MEMS storage architectures, ACM Transactions on Storage (TOS), v.2 n.1, p.1-21, February 2006
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