| Energy optimization techniques in cluster interconnects |
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International Symposium on Low Power Electronics and Design
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Proceedings of the 2003 international symposium on Low power electronics and design
table of contents
Seoul, Korea
SESSION: Sensor networks and communication systems
table of contents
Pages: 459 - 464
Year of Publication: 2003
ISBN:1-58113-682-X
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Authors
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E. J. Kim
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Pennsylvania State University, University Park, PA
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K. H. Yum
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The University of Texas at San Antonio, San Antonio, TX
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G. M. Link
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Pennsylvania State University, University Park, PA
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N. Vijaykrishnan
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Pennsylvania State University, University Park, PA
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M. Kandemir
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Pennsylvania State University, University Park, PA
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M. J. Irwin
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Pennsylvania State University, University Park, PA
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M. Yousif
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The University of Texas at San Antonio, San Antonio, TX
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C. R. Das
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Pennsylvania State University, University Park, PA
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| Bibliometrics |
Downloads (6 Weeks): 6, Downloads (12 Months): 40, Citation Count: 22
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ABSTRACT
Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applications. Since the links and switch buffers consume the major portion of the power budget of the cluster, the focus of this paper is to optimize the energy consumption in these two components. To minimize power in the links, we propose a novel dynamic link shutdown (DLS) technique. The DLS technique makes use of an appropriate adaptive routing algorithm to shutdown the links intelligently. We also present an optimized buffer design for reducing leakage energy. Our analysis on different networks using a complete system simulator reveals that the proposed DLS technique can provide optimized performance-energy behavior (up to 40% energy savings with less than 5% performance degradation in the best case) for the cluster interconnects.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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W. Dally, P. Carvey, and L. Dennison. The Avici Terabit Switch/Router. In Proc. Hot Interconnects 6, 1998.
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InfiniBand Trade Association. InfiniBand Architecture Specification, Volume 1, Release 1.0, October 2000. Available from http://www.infinibandta.org.
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J. Kim and M. Horowitz. Adaptive Supply Serial Links with Sub-1V Operation and Per-Pin Clock Recovery. In Proc. ISSCC, 2002.
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Tajana Šimunić , Luca Benini , Giovanni De Micheli, Cycle-accurate simulation of energy consumption in embedded systems, Proceedings of the 36th ACM/IEEE conference on Design automation, p.867-872, June 21-25, 1999, New Orleans, Louisiana, United States
[doi> 10.1145/309847.310090]
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The New York Times. There's money in housing internet servers, April 2001. http://www.internetweek.com/story/INW20010427S0010.
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T. G. Tip. RDRAM Power Estimation and Thermal Considerations, October 2001. http://www.rambus.com/rdf/presentations/2_A3_Thermal_Yip2.pdf.
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G.-Y. Wei, S. Sidiropoulos, D. Liu, J. Kim, and M. Horowitz. A Variable-Frequency Parallel I/O Interface with Adaptive Power-Supply Regulation. IEEE J. of Solid-State Circuits, 35, Nov. 2000.
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CITED BY 22
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S. W. Son , G. Chen , M. Kandemir , A. Choudhary, Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems, Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, June 15-17, 2005, Chicago, IL, USA
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Feihui Li , Guangyu Chen , Mahmut Kandemir , Mary Jane Irwin, Compiler-directed proactive power management for networks, Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems, September 24-27, 2005, San Francisco, California, USA
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Vassos Soteriou , Noel Eisley , Li-Shiuan Peh, Software-directed power-aware interconnection networks, Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems, September 24-27, 2005, San Francisco, California, USA
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Li Shang , Li-Shiuan Peh , Amit Kumar , Niraj K. Jha, Thermal Modeling, Characterization and Management of On-Chip Networks, Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture, p.67-78, December 04-08, 2004, Portland, Oregon
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