ACM Home Page
Please provide us with feedback. Feedback
Digital Library logoTake a look at the new version of this page: [ beta version ]. Tell us what you think.
Microprocessor pipeline energy analysis
Full text PdfPdf (111 KB)
Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2003 international symposium on Low power electronics and design table of contents
Seoul, Korea
SESSION: System estimation and voltage scheduling table of contents
Pages: 282 - 287  
Year of Publication: 2003
ISBN:1-58113-682-X
Authors
Karthik Natarajan  The University of Texas at Austin, Austin, TX
Heather Hanson  The University of Texas at Austin, Austin, TX
Stephen W. Keckler  The University of Texas at Austin, Austin, TX
Charles R. Moore  The University of Texas at Austin, Austin, TX
Doug Burger  The University of Texas at Austin, Austin, TX
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 12,   Downloads (12 Months): 31,   Citation Count: 2
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/871506.871577
What is a DOI?

ABSTRACT

The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wide-issue, highly speculative cores. Microarchitectural speculation, such as branch prediction, increases instruction throughput but carries a power burden due to wasted power for mis-speculated instructions. Pipeline over-provisioning supplies excess resources which often go unused. In this paper, we use our detailed performance and power model for an Alpha 21264 to measure both the useful energy and the wasted effort due to mis-speculation and over-provisioning. Our experiments show that flushed instructions account for approximately 6% of total energy, while over-provisioning imposes a tax of 17% on average. These results suggest opportunities for power savings and energy efficiency throughout microprocessor pipelines.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
 
2
 
3
Compaq Computer Corporation. Alpha 21264 Microprocessor Hardware Reference Manual, July 1999.
 
4
Compaq Computer Corporation. Compiler Writer's Guide for the Alpha 21264, 1999.
5
6
 
7
B. A. Gieseke, R. L. Allmon, D. W. Bailey, B. J. Benschneider, S. M. Britton, J. D. Clouser, H. R. F. III, J. A. Farrell, M. K. Gowan, C. L. Houghton, J. B. Keller, T. H. Lee, D. Leibholz, S. C. Lowell, M. D. Matson, R. J. Matthew, V. Peng, M. D. Quinn, D. A. Priore, M. J. Smith, and K. E. Wilcox. A 600 Mhz superscalar RISC microprocessor with out-of-order execution. In IEEE International Solid-State Circuits Conference, pages 176--177, 451, February 1997.
8
 
9
A. Iyer and D. Marculescu. Run--time scaling of microarchitecture resources in a processor for energy savings. In Cool Chips Workshop, held in conjunction with MICRO--33, 2000.
10
 
11
12
 
13
 
14
 
15
 
16
K. Wilcox and S. Manne. Alpha processors: A history of power issues and a look to the future. In Cool Chips Tutorial: An Industrial Perspective on Low Power Processor Design, pages 16--37, 1999.


Collaborative Colleagues:
Karthik Natarajan: colleagues
Heather Hanson: colleagues
Stephen W. Keckler: colleagues
Charles R. Moore: colleagues
Doug Burger: colleagues