Reducing power density through activity migration

ABSTRACT

Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Excessive junction temperature reduces reliability and can lead to catastrophic failure. We examine the use of activity migration which reduces peak junction temperature by moving computation between multiple replicated units. Using a thermal model that includes the temperature dependence of leakage power, we show that sustainable power dissipation can be increased by nearly a factor of two for a given junction temperature limit. Alternatively, peak die temperature can be reduced by 12.4°C at the same clock frequency. The model predicts that migration intervals of around 20--200 are required to achieve the maximum sustainable power increase. We evaluate several different forms of replication and migration policy control.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Advanced technologies

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration); Microprocessors and microcomputers

General Terms:
Design, Performance, Reliability

Keywords:
activity migration, temperature reduction, thermal model