An overview of the PL.8 compiler

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An overview of the PL.8 compiler

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Symposium on Compiler Construction archive
Proceedings of the 1982 SIGPLAN symposium on Compiler construction table of contents

Boston, Massachusetts, United States

Pages: 22 - 31

Year of Publication: 1982

ISBN:0-89791-074-5

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Authors

Marc Auslander	IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York
Martin Hopkins	IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York

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SIGPLAN: ACM Special Interest Group on Programming Languages

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ACM New York, NY, USA

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Downloads (6 Weeks): 9, Downloads (12 Months): 64, Citation Count: 59

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abstract references cited by index terms collaborative colleagues

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ABSTRACT

The PL.8 compiler accepts multiple source languages and produces high quality object code for several different machines. The strategy used is to first do a simple translation of the source program to a low level intermediate language. Global optimization and register allocation are then used to improve code rather than relying on special case code selection.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Allen, F.E., "Bibliography on Program Optimization," IBM Research Report RC5767, 1975.
	2	Allen, F.E., et al, "The experimental compiling system", IBM Journal of Research and Development, Vol. 24, No. 6, Nov 1980, pp. 695-715
	3	F. E. Allen , J. Cocke, A program data flow analysis procedure, Communications of the ACM, v.19 n.3, p.137, March 1976 [doi>10.1145/360018.360025]
	4	J. Lawrence Carter, A case study of a new code generation technique for compilers, Communications of the ACM, v.20 n.12, p.914-920, Dec. 1977 [doi>10.1145/359897.359902]
	5	Chaitin, G. J., et al, "Register Allocation via Coloring," Computer Languages, Vol. 6, pp. 45-57, 1981, Great Britain.
	6	G. J. Chaitin, Register allocation & spilling via graph coloring, Proceedings of the 1982 SIGPLAN symposium on Compiler construction, p.98-105, June 23-25, 1982, Boston, Massachusetts, United States
	7	Cocke, J. and Markstein, P., "Measurement of Program Improvement Algorithms." Proc. IFIP Cong. '80, Tokyo, Japan Oct. 6 - 9, 1980, Melbourne, Australia Oct. 14 - 17 1980, 221-228.
	8	William Harrison, A new strategy for code generation: the general purpose optimizing compiler, Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages, p.29-37, January 17-19, 1977, Los Angeles, California [doi>10.1145/512950.512954]
	9	Victoria Markstein , John Cocke , Peter Markstein, Optimization of range checking, Proceedings of the 1982 SIGPLAN symposium on Compiler construction, p.114-119, June 23-25, 1982, Boston, Massachusetts, United States
	10	George Radin, The 801 minicomputer, Proceedings of the first international symposium on Architectural support for programming languages and operating systems, p.39-47, March 01-03, 1982, Palo Alto, California, United States

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	Albert Chang , Mark F. Mergen, 801 storage: architecture and programming, ACM Transactions on Computer Systems (TOCS), v.6 n.1, p.28-50, Feb. 1988
	M. E. Benitez , J. W. Davidson, A portable global optimizer and linker, ACM SIGPLAN Notices, v.23 n.7, p.329-338, July 1988
	Pradip Bose, Optimal code generation for expressions on super scalar machines, Proceedings of 1986 ACM Fall joint computer conference, p.372-379, November 1986, Dallas, Texas, United States
	J. R. Goodman , W. C. Hsu, On the use of registers vs. cache to minimize memory traffic, ACM SIGARCH Computer Architecture News, v.14 n.2, p.375-383, June 1986
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	J.-J. Shieh , C. Papachristou, On reordering instruction streams for pipelined computers, ACM SIGMICRO Newsletter, v.20 n.3, p.199-206, Sep. 1989
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	Jong-Jiann Shieh , Christos A. Papachristou, An instruction reoderer for pipelined computers, Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture, p.135-142, November 27-29, 1990, Orlando, Florida, United States
	Vivek Sarkar , Mauricio J. Serrano , Barbara B. Simons, Register-sensitive selection, duplication, and sequencing of instructions, Proceedings of the 15th international conference on Supercomputing, p.277-288, June 2001, Sorrento, Italy
	John L. Hennessy , Thomas Gross, Postpass Code Optimization of Pipeline Constraints, ACM Transactions on Programming Languages and Systems (TOPLAS), v.5 n.3, p.422-448, July 1983
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	Manuel E. Benitez , Jack W. Davidson, Code generation for streaming: an access/execute mechanism, ACM SIGPLAN Notices, v.26 n.4, p.132-141, Apr. 1991
	S. Jain , C. Thompson, An efficient approach to data flow analysis in a multiple pass global optimizer, ACM SIGPLAN Notices, v.23 n.7, p.154-163, July 1988
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	B. Alpern , M. N. Wegman , F. K. Zadeck, Detecting equality of variables in programs, Proceedings of the 15th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.1-11, January 10-13, 1988, San Diego, California, United States
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	D. Bernstein , M. Golumbic , y. Mansour , R. Pinter , D. Goldin , H. Krawczyk , I. Nahshon, Spill code minimization techniques for optimizing compliers, ACM SIGPLAN Notices, v.24 n.7, p.258-263, July 1989
	W. Y. Chen , P. P. Chang , T. M. Conte , W. W. Hwu, The Effect of Code Expanding Optimizations on Instruction Cache Design, IEEE Transactions on Computers, v.42 n.9, p.1045-1057, September 1993
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	P. P. Chang , W.-W. Hwu, Inline function expansion for compiling C programs, ACM SIGPLAN Notices, v.24 n.7, p.246-257, July 1989
	B. K. Rosen , M. N. Wegman , F. K. Zadeck, Global value numbers and redundant computations, Proceedings of the 15th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.12-27, January 10-13, 1988, San Diego, California, United States
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	T. Nakatani , K. Ebcioglu, Making Compaction-Based Parallelization Affordable, IEEE Transactions on Parallel and Distributed Systems, v.4 n.9, p.1014-1029, September 1993
	Wei-Chung Hsu , Charles N. Fisher , James R. Goodman, On the Minimization of Loads/Stores in Local Register Allocation, IEEE Transactions on Software Engineering, v.15 n.10, p.1252-1260, October 1989
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	F. E. Allen, A technological review of the FORTRAN I compiler, Proceedings of the June 7-10, 1982, national computer conference, June 07-10, 1982, Houston, Texas
	Martin E. Hopkins, A perspective on the 801/Reduced Instruction Set Computer, IBM Systems Journal, v.26 n.1, p.107-121, Jan. 1987
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	C. Binding , W. Bouma , M. Dauphin , G. Karjoth , Y. Yang, A common compiler for LOTOS and SDL specifications, IBM Systems Journal, v.31 n.4, p.668-690, 1992
	J. Cocke , V. Markstein, The evolution of RISC technology at IBM, IBM Journal of Research and Development, v.34 n.1, p.4-11, Jan. 1990
	H. S. Warren, Jr., Instruction scheduling for the IBM RISC System/6000 processor, IBM Journal of Research and Development, v.34 n.1, p.85-92, Jan. 1990
	M. C. Golumbic , V. Rainish, Instruction scheduling beyond basic blocks, IBM Journal of Research and Development, v.34 n.1, p.93-97, Jan. 1990
	J. H. Moreno , M. Moudgill , K. Ebcioğlu , E. Altman , C. B. Hall , R. Miranda , S.-K. Chen , A. Polyak, Simulation/evaluation environment for a VLIW processor architecture, IBM Journal of Research and Development, v.41 n.3, p.287-302, May 1997
	R. O. Simpson , P. D. Hester, The IBM RT PC ROMP processor and memory management unit architecture, IBM Systems Journal, v.26 n.4, p.346-360, Dec. 1987
	R. Q. Cordell, II , M. Misra , R. F. Wolfe, Advanced interactive executive program development environment, IBM Systems Journal, v.26 n.4, p.361-382, Dec. 1987