A high quality, low cost router for MOS/LSI

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A high quality, low cost router for MOS/LSI

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 9th Design Automation Workshop table of contents

Pages: 94 - 103

Year of Publication: 1972

Author

Roland L. Mattison

Sponsors

IEEE : Institute of Electrical and Electronics Engineers
ACM: Association for Computing Machinery

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 8, Citation Count: 27

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abstract references cited by index terms collaborative colleagues

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ABSTRACT

This paper presents the implementation of an automatic router for the custom design of MOS integrated circuits. Standard cells are utilized for the logical functions and are interconnected by the router according to the specific design being produced. The design program operates at a very low cost and yields results comparable to manual routing. An expansion technique is used which will give 100 percent completion of interconnection. The router will handle any cell size and will route according to any predetermined design rules. An accuracy of one-hundredth of a mil can be maintained on chips over 300 mils on a side. The router may be used to build designs automatically or, because of its very low cost, can allow manual intervention to achieve more efficient layouts.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	David W. Hightower, A solution to line-routing problems on the continuous plane, Proceedings of the 6th annual conference on Design Automation, p.1-24, January 1969 [doi>10.1145/800260.809014]
	2	C.Y. Lee, "An Algorithm for Path Connections and Its Applications," IRE Transactions on Electronic Computers, pp. 346-365, September 1961.
	3	E. G. Ulrich , T. Baker , L. R. Williams, Fault-test analysis techniques based on logic simulation, Proceedings of the 9th workshop on Design automation, p.111-115, June 26-28, 1972 [doi>10.1145/800153.804936]
	4	Donald M. Schuler , Ernst G. Ulrich, Clustering and linear placement, Proceedings of the 9th workshop on Design automation, p.50-56, June 26-28, 1972 [doi>10.1145/800153.804929]
	5	C. Berge, A. Ghouila-Houri, Programming Games and Transportation Networks (New York: John Wiley, 1962) p. 179.
	6	Akihiro Hashimoto , James Stevens, Wire routing by optimizing channel assignment within large apertures, Proceedings of the 8th workshop on Design automation, p.155-169, June 28-30, 1971, Atlantic City, New Jersey, United States [doi>10.1145/800158.805069]

CITED BY 27

	Ulrich Lauther, A data structure for gridless routing, Proceedings of the 17th conference on Design automation, p.603-609, June 23-25, 1980, Minneapolis, Minnesota, United States
	B. T. Preas , C. W. Gwyn, Methods for hierarchical automatic layout of custom LSI circuit masks, Proceedings of the 15th conference on Design automation, p.206-212, June 19-21, 1978, Las Vegas, Nevada, United States
	Tokinori Kozawa , Hiroshi Horino , Tadakatu Ishiga , Junya Sakemi , Shoji Sato, Advanced LILAC - an Automated Layout Generation system for MOS/LSIs, Proceedings of the 11th workshop on Design automation, p.26-46, January 1974
	Koji Sato , Takao Nagai , Mikio Tachibana , Hiroyoshi Shimoyama , Masaru Ozaki , Toshihiko Yahara, MILD - A cell-based layout system for MOS-LSI, Proceedings of the 18th conference on Design automation, p.828-836, June 29-July 01, 1981, Nashville, Tennessee, United States
	David W. Hightower , Robert L. Boyd, A generalized channel router, Proceedings of the 17th conference on Design automation, p.12-21, June 23-25, 1980, Minneapolis, Minnesota, United States
	Donald M. Schuler , Ernst G. Ulrich, Clustering and linear placement, Proceedings of the 9th workshop on Design automation, p.50-56, June 26-28, 1972
	G. Persky, PRO - an automatic string placement program for polycell layout, Proceedings of the 13th conference on Design automation, p.417-424, June 28-30, 1976, San Francisco, California, United States
	G. Persky , H. K. Gummel, GRAFOS - A symbolic routing language, Proceedings of the 10th workshop on Design automation, p.173-181, June 25-27, 1973
	G. Persky , D. N. Deutsch , D. G. Schweikert, LTX - a system for the directed automatic design of LSI circuits, Proceedings of the 13th conference on Design automation, p.399-407, June 28-30, 1976, San Francisco, California, United States
	B. W. Kernighan , D. G. Schweikert , G. Persky, An optimum channel-routing algorithm for polycell layouts of integrated circuits, Papers on Twenty-five years of electronic design automation, p.57-66, June 1988
	G. Persky , D. N. Deutsch , D. G. Schweikert, LTX-A system for the directed automatic design of LSI circuits, Papers on Twenty-five years of electronic design automation, p.93-101, June 1988
	H. J. Rothermel , D. A. Mlynski, Routing method for VLSI design using irregular cells, Proceedings of the 20th conference on Design automation, p.257-262, June 27-29, 1983, Miami Beach, Florida, United States
	Koji Sato , Hiroyoshi Shimoyama , Takao Nagai , Masaru Ozaki , Toshihiko Yahara, A “grid-free” channel router, Proceedings of the 17th conference on Design automation, p.22-31, June 23-25, 1980, Minneapolis, Minnesota, United States
	D. N. Deutsch, A “DOGLEG” channel router, Papers on Twenty-five years of electronic design automation, p.111-119, June 1988
	D. G. Schweikert, A 2-dimensional placement algorithm for the layout of electrical circuits, Papers on Twenty-five years of electronic design automation, p.102-110, June 1988
	D. M. Schuler , E. G. Ulrich, Clustering and linear placement, Papers on Twenty-five years of electronic design automation, p.50-56, June 1988
	David W. Hightower, The interconnection problem - a tutorial, Proceedings of the 10th workshop on Design automation, p.1-21, June 25-27, 1973
	Daniel G. Schweikert, A 2-dimensional placement algorithm for the layout of electrical circuits., Proceedings of the 13th conference on Design automation, p.408-416, June 28-30, 1976, San Francisco, California, United States
	Kenneth A. Roberts , Thomas E. Baker , David H. Jerome, A vertically organized computer-aided design data base, Proceedings of the 18th conference on Design automation, p.595-602, June 29-July 01, 1981, Nashville, Tennessee, United States
	B. W. Kernighan , D. G. Schweikert , G. Persky, An optimum channel-routing algorithm for polycell layouts of integrated circuits, Proceedings of the 10th workshop on Design automation, p.50-59, June 25-27, 1973
	G. Persky , C. Enger , D. M. Selove, The Hughes Automated Layout System - automated LSI/VLSI layout based on channel routing, Proceedings of the 18th conference on Design automation, p.22-28, June 29-July 01, 1981, Nashville, Tennessee, United States
	David N. Deutsch, A “Dogleg” channel router, Proceedings of the 13th conference on Design automation, p.425-433, June 28-30, 1976, San Francisco, California, United States
	Guy Dupenloup, A wire routing scheme for double-layer cell arrays, Proceedings of the 21st conference on Design automation, p.32-37, June 25-27, 1984, Albuquerque, New Mexico, United States
	Sungho Kang, Linear ordering and application to placement, Proceedings of the 20th conference on Design automation, p.457-464, June 27-29, 1983, Miami Beach, Florida, United States
	W. G. Cage , R. J. Smith, II, A rectangle-probe router for multilayer P.C. boards*, Proceedings of the 14th conference on Design automation, p.13-22, January 1977
	Ivan R. Dobes, A multi-contouring algorithm, ACM SIGDA Newsletter, v.7 n.2, p.2-11, June 1977
	Herman Beke , Willy Sansen, CALMOS: A portable software system for the automatic and interactive layout of MOS/LSI, Proceedings of the 16th Conference on Design automation, p.102-108, June 25-27, 1979, San Diego, CA, United States