Table lookup techniques for fast and flexible digital logic simulation

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Table lookup techniques for fast and flexible digital logic simulation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 17th Design Automation Conference table of contents

Minneapolis, Minnesota, United States

Pages: 560 - 563

Year of Publication: 1980

ISBN:0-89791-020-6

Author

Ernst Ulrich

Sponsors

IEEE-CS\DATC : IEEE Computer Society
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 1, Downloads (12 Months): 5, Citation Count: 10

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ABSTRACT

A well-known fundamental computer technique consists of the “interpretation” of naturally available or artifically formed data items as addresses to perform table-lookups. Although well-known, this technique is still not exploited to its fullest potential. The power and extent of this technique as applied to logic simulation is demonstrated.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Breuer, M. and Friedman, A. "Diagnosis and Reliable Design of Digital Systems." Computer Science Press, 1976, page 221.
	2	Phillips, N.; Tellier, J. Efficient Event Manipulation - "The Key to Large Scale Simulation." Semiconductor Test Conference, 1978.
	3	Stephen A. Szygenda , Cliff W. Hemming , John M. Hemphill, Time flow mechanisms for use in digital logic simulation, Proceedings of the 5th conference on Winter simulation, p.488-495, December 08-10, 1971, New York, NY [doi>10.1145/800294.811476]
	4	Ernst G. Ulrich, Exclusive simulation of activity in digital networks, Communications of the ACM, v.12 n.2, p.102-110, Feb. 1969 [doi>10.1145/362848.362870]
	5	E. G. Ulrich , T. Baker , L. R. Williams, Fault-test analysis techniques based on logic simulation, Proceedings of the 9th workshop on Design automation, p.111-115, June 26-28, 1972 [doi>10.1145/800153.804936]
	6	Ernst G. Ulrich, Event manipulation for discrete simulations requiring large numbers of events, Communications of the ACM, v.21 n.9, p.777-785, Sept. 1978 [doi>10.1145/359588.359611]
	7	E. Ulrich , D. Lacy , N. Phillips , J. Tellier , M. Kearney , T. Elkind , R. Beaven, High-speed concurrent fault simulation with vectors and scalars, Proceedings of the 17th conference on Design automation, p.374-380, June 23-25, 1980, Minneapolis, Minnesota, United States [doi>10.1145/800139.804558]

CITED BY 10

	A. Bataineh , F. Özgüner, Parallel-and-vector implementation of the event-driven logic simulation algorithm on the Cray Y-MP supercomputer, Proceedings of the 1992 ACM/IEEE conference on Supercomputing, p.444-452, November 16-20, 1992, Minneapolis, Minnesota, United States
	Pavlos Konas , Pen-Chung Yew, Processor self-scheduling in parallel discrete event simulation, Proceedings of the 27th conference on Winter simulation, p.682-689, December 03-06, 1995, Arlington, Virginia, United States
	Ernst Ulrich , Dennis Hebert, Speed and accuracy in digital network simulation based on structural modeling, Proceedings of the 19th conference on Design automation, p.587-593, January 1982
	Robert J. Smith, II, Fundamentals of parallel logic simulation, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.2-12, July 1986, Las Vegas, Nevada, United States
	E. Ulrich , D. Lacy , N. Phillips , J. Tellier , M. Kearney , T. Elkind , R. Beaven, High-speed concurrent fault simulation with vectors and scalars, Proceedings of the 17th conference on Design automation, p.374-380, June 23-25, 1980, Minneapolis, Minnesota, United States
	M. Abramovici , Y. H. Levendel , P. R. Menon, A logic simulation machine, Proceedings of the 19th conference on Design automation, p.65-73, January 1982
	Ernst Ulrich, A design verification methodology based on concurrent simulation and clock suppression, Proceedings of the 20th conference on Design automation, p.709-712, June 27-29, 1983, Miami Beach, Florida, United States
	V. Ashok , R. Costello , P. Sadayappan, Modeling switch-level simulation using data flow, Proceedings of the 22nd ACM/IEEE conference on Design automation, p.637-644, June 1985, Las Vegas, Nevada, United States
	Ernst Ulrich , Karen Panetta Lentz , Stephen Demba , Rahul Razdan, Concurrent MIN-MAX simulation, Proceedings of the conference on European design automation, February 25-28, 1991, Amsterdam, The Netherlands
	M. Abramovici , Y. H. Levendel , P. R. Menon, A logic simulation machine, ACM SIGARCH Computer Architecture News, v.10 n.3, p.148-157, April 1982