Methods for generalized deductive fault simulation

ABSTRACT

In this paper, the authors describe methods for generalized deductive fault simulation of digital networks. By introducing the notion of unknown fault list, the propagation algorithm through gates modelized with rise and fall times are simplified with the same accuracy.

REFERENCES

• 1: C. Chicoix , J. Pedoussat , N. Giambiasi, An accurate time delay model for large digital network simulation, Proceedings of the 13th conference on Design automation, p.54-60, June 28-30, 1976, San Francisco, California, United States [doi>10.1145/800146.804795]
• 2: A. Miara , N. Giambiasi, Dynamic and deductive fault simulation, Proceedings of the 15th conference on Design automation, p.439-443, June 19-21, 1978, Las Vegas, Nevada, United States
• 3: N. Giambiasi , A. Miara , D. Muriach, SILOG: A practical tool for large digital network simulation, Proceedings of the 16th Conference on Design automation, p.263-271, June 25-27, 1979, San Diego, CA, United States
• 4: Szygenda, S., Thompson, W., "Modeling and digital simulation for design verification and diagnosis", IEEE Trans. on Computers, Dec. 1976.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.8 Performance and Reliability
      B.8.1 Reliability, Testing, and Fault-Tolerance

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.3 Design Aids
          Subjects: Simulation

General Terms:
Design, Reliability