An extensible architecture for data flow processing

ABSTRACT

In this research, we propose a general model for computer architectures. This model allows us to integrate some of the existing system architecture approaches for increasing computer capacity and indicates new possibilities for improving the cost/performance ratio of future computer systems. The model leads to the development of general purpose data flow machines and to different degrees of sophistication within these machines. Our fundamental approach is to separate the CPU into elementary components. This allows us to make a distinction between components for control and components for performing various processing functions, thus yielding a high degree of resource sharing.

REFERENCES

• 1: Barnes, G.H., R.M. Brown, M. Kato, D.J. Kuck, D.L. Slotnick and R.A. Stokes, "The ILLIAC IV Computer," IEEE Trans. Computers C-17, No. 8 (August 1968), pp. 746-757.
• 2: Cohen, Ellis S., "Semantic Models for Parallel Systems," Department of Computer Science, Carnegie-Mellon University, January 1975.
• 3: Control Data Corporation, Control Data STAR-100 Computer Hardware Reference Manual, 1974.
• 4: Dennis, Jack B., #"First Version of a Data Flow Procedure Language," Massachusetts Institute of Technology Project MAC, Computation Structures Group Memo 93-1, August 1974.
• 5: Dennis, Jack B. and David P. Misunas, "A Preliminary Architecture for a Basic Data Flow Processor," Massachusetts Institute of Technology Project MAC Computation Structures Group Memo 102, August 1974.
• 6: J. Dennis, DATA FLOW COMPUTER ARCHITECTURE FINAL REPORT, Massachusetts Institute of Technology, Cambridge, MA, 1987
• 7: Philip Enslow, Jr., Multiprocessor Organization—a Survey, ACM Computing Surveys (CSUR), v.9 n.1, p.103-129, March 1977 [doi>10.1145/356683.356688]
• 8: Gurd, J.R., P.C. Treleoren and I. Watson, "A Data Flow Computer Architecture," Working Paper, University of Manchester, 1977.
• 9: Keyes, Robert W., "Physical Limits in Digital Electronics," Thomas J. Watson Research Center Yorktown Heights, New York, RC5169, December 1974.
• 10: Paul R. Kosinski, A data flow language for operating systems programming, Proceeding of ACM SIGPLAN - SIGOPS interface meeting on Programming languages - operating systems, p.89-94, January 1973
• 11: Miller, Raymond E., "A Comparison of Some Theoretical Models of Parallel Computation," IEEE Transactions on Computers, Vol. C-22, No. 8, August 1973.
• 12: Miller, Raymond E. and J. Cocke, "Configurable Computers: A New Class of General Purpose Machines," Lecture Notes in Computer Science, Vol. 5, Springer-Verlag, 1974.
• 13: Miller, Raymond E. and J.D. Rutledge, "Generating a Data Flow Model of a Program," IBM Tech. Disclosure Bulletin, Vol. 8, 1966. pp. 1150-1153.
• 14: Rumbaugh, James, "A Data Flow Multiprocessor", Proceedings of 1975 Sagamore Computer Conference on Parallel Processing.
• 15: Richard M. Russell, The CRAY-1 computer system, Communications of the ACM, v.21 n.1, p.63-72, Jan. 1978 [doi>10.1145/359327.359336]
• 16: Schroeder, M.A. and R.A. Meyer, "A Distributed Computer System Using a Data Flow Approach," Proceedings of the 1977 International Conference on Parallel Processing.
• 17: Texas Instruments, Inc., A Description of the Advanced Scientific Computer System, Austin, Texas, April 1973.
• 18: Wong, C.K. and D.T. Tang, "Dynamic Memories with Faster Random and Sequential Access," IBM Research, Computer Sciences Department, York-Town Heights, New York, RC5682, October 16, 1975.

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.0 GENERAL
      Subjects: System architectures

Additional Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.3 Other Architecture Styles
          Subjects: Data-flow architectures
  C.4 PERFORMANCE OF SYSTEMS
      Subjects: Modeling techniques

General Terms:
Design, Management, Performance