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Direct Execution In A High-Level Computer Architecture
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Proceedings of the 1978 annual conference table of contents
Washington, D.C., United States
Pages: 289 - 300  
Year of Publication: 1978
ISBN:0-89791-000-1
Author
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

A high-level computer architecture is one where its structure reflects the constructs of high-level programming languages. This paper describes the structure of a high-level computer architecture, which makes use of the basic concepts of control flow and data flow of programming languages. In this structure, there are the lexical, control and data processors to handle the lexical, control and data elements, respectively. Each processor is associated with an associative memory, and the associative memories are used not for storing data or program but for storing structural information about the data and program. Direct execution of this high-level architecture is described and then illustrated by a token-by-token description of the direct-execution of a sample program.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
McKeeman, W.M., "Language Directed Computer Design", Proc. of AFIPS FJCC, 1967, pp. 413-417.
 
2
Anderson, P.P., "A Computer for Direct-Execution of Algorithmic Languages", Proc. of EJCC, 1961, pp. 184-193.
 
3
Robinet, B.J., "Architectural Design of a Directly-Executed APL Processor", Tech. Report, TR-320, Dept. of Comp. Sci., University of Md., August, 1974. (NITS PB-235775/AS).
 
4
Bloom, H.M., "Conceptual Design of a Direct High-Level Language Processor", Tech. Report TR-239, Dept. of Comp. Sci., University of Md., April, 1973. (NITS PB-224098/AS).
 
5
Chu, Y. "Introducing the High-Level Language Computer Architecture", High-Level Language Computer Architecture, Academic Press, 1975, pp. 1-4.
 
6
Chu, Y., J.C. Yeh, and E.R. Cannon, "Direct-Execution on the Burroughs B1700 System", Tech. Report TR-335, Dept. of Comp. Sci., University of Md., Oct. 1974.
 
7
Chu, Y. "Direct-Execution Computer Architecture", Proc. of IFIP Congress, Toronto; Canada, August, 1977.
 
8
Chu, Y. and E.R. Cannon, "Interactive High-Level Language Direct-Execution Microprocessor Systems", IEEESE, June 1976, pp. 126-134.
 
9
Carlson, C.R., "A Survey of High-Level Language Computer Architecture", HIGH-LEVEL LANGUAGE COMPUTER ARCHITECTURE, Academic Press, Inc., 1975.
 
10
Chu, Y. and E.R. Cannon, "A Programming Language for High-Level Computer Architecture", Tech. Report TR-534, Dept. of Comp. Sci., University of Md., May 1977.
 
11
Chu, Y. and E.R. Cannon, "Design of a High-Level Computer Architecture", Tech. Report TR-550, Dept. of Comp. Sci., University of Md., June 1977.
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Chu, Y., H.M. Bl-om, and E.R. Cannon, "High-level Language Hardware Control Structure", Tech. Report TR-412, Dept. of Comp. Sci., University of Md., October 1975.
 
15
Chu, Y. "Evolution of Computer Memory Structure", Proc. of NCC, June 1976, pp. 733-748.
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17
Chu, Y. "An LSI Modular Direct-Execution Computer Organization", COMPUTER, IEEE Computer Society, July, 1978, pp. 69-76.