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A characterization of the power of vector machines
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Source Annual ACM Symposium on Theory of Computing archive
Proceedings of the sixth annual ACM symposium on Theory of computing table of contents
Seattle, Washington, United States
Pages: 122 - 134  
Year of Publication: 1974
Authors
Sponsor
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 19,   Citation Count: 11
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ABSTRACT

Random access machines (RAMs) are usually defined to have registers that hold integers. While this captures in part the structure of a commercial computer, it overlooks an implementation-dependent feature of most binary oriented machines, namely their ability to operate bit by bit on the bit vectors used to represent integers. Typical operations are bit-wise Boolean operations (and, or, not, etc.) and shifts by an amount specified in some register. These operations are ideal for certain problems, such as dealing with sets represented as bit vectors, some parsing algorithms [4], propositional calculus theorem proving, and analysis of sorting networks. A RAM so implemented we shall call a vector machine.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Aho, A., J. Hopcroft and J. Ullman. 1968. Time and tape complexity of pushdown automaton languages. Information and Control 13, 186-206.
2
 
3
Savitch, W.J. 1970. Relationships between nondeterministic and deterministic tape complexities, Journal of Computer and System Sciences 4, 177-192.
 
4
Younger, D. 1967. Recognition and parsing of context-free languages in time n3. Information and Control 10, 2, 189-208.

CITED BY  11

Collaborative Colleagues:
Vaughan R. Pratt: colleagues
Michael O. Rabin: colleagues
Larry J. Stockmeyer: colleagues