The PDP-11

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The PDP-11: A case study of how not to design condition codes

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International Symposium on Computer Architecture archive
Proceedings of the 5th annual symposium on Computer architecture table of contents

Pages: 190 - 194

Year of Publication: 1978

Author

Robert D. Russell

Sponsors

ACM: Association for Computing Machinery
IEEE-CS : Computer Society

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 7, Downloads (12 Months): 19, Citation Count: 4

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ABSTRACT

This paper investigates a design weakness in the PDP-11 architecture, namely the condition code bits. Experience with the machine has demonstrated a number of “traps” for the unwary programmer stemming directly from an inconsistent and sometimes confusing scheme of condition code settings. This is particularly annoying in view of the otherwise clean architectural characteristics of the machine. A number of “principles” are proposed that would correct the deficiencies and could therefore be used as a guide for designing future machines. The paper also presents some measurements based on actual programmatic usage of the PDP-11 that question the validity of a condition code scheme as an efficient architectural technique.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Gordon Bell , William D. Strecker, Computer structures: What have we learned from the PDP-11?, Proceedings of the 3rd annual symposium on Computer architecture, p.1-14, January 19-21, 1976
	2	Digital Equipment Corporation PDP-11/70 Processor Handbook (1975).
	3	Åmund Lunde, Empirical evaluation of some features of instruction set processor architectures, Communications of the ACM, v.20 n.3, p.143-153, March 1977 [doi>10.1145/359436.359442]
	4	Robert D. Russell, Experience in the design, implementation and use of PL-11, a programming language for the PDP-11, Proceedings of the ACM SIGMINI/SIGPLAN interface meeting on Programming systems in the small processor environment, p.27-34, March 04-06, 1976, New Orleans, Louisiana, United States
	5	Guy L. Steele, Arithmetic shifting considered harmful, ACM SIGPLAN Notices, v.12 n.11, p.61-69, November 1977 [doi>10.1145/956641.956647]
	6	Andrew S. Tanenbaum, Ambiguous machine architecture and program efficiency, ACM SIGARCH Computer Architecture News, v.6 n.3, p.11-13, August 1977 [doi>10.1145/859402.859404]

CITED BY 4

	Nenad Marovac, A systematic approach to the design and implementation of a computer instruction set, ACM SIGARCH Computer Architecture News, v.11 n.1, p.19-24, March 1983
	J. A. DeRosa , H. M. Levy, An evaluation of branch architectures, Proceedings of the 14th annual international symposium on Computer architecture, p.10-16, June 02-05, 1987, Pittsburgh, Pennsylvania, United States
	D. R. Ditzel , H. R. McLellan, Branch folding in the CRISP microprocessor: reducing branch delay to zero, Proceedings of the 14th annual international symposium on Computer architecture, p.2-8, June 02-05, 1987, Pittsburgh, Pennsylvania, United States
	Fleur Liane Williams, Should SCC set condition codes?, ACM SIGARCH Computer Architecture News, v.16 n.4, p.145-149, Sept. 1988