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ABSTRACT
Information is not transferred instantaneously; there is always a propagation delay before an output is available as an input to the next computational step. Propagation delay is a function of wire length, so we study the length of edges in planar graphs. We prove matching (to within a constant factor) upper and lower bounds on minimax edge length for four planar embedding problems for complete binary trees. (The results are summarized in Table 1.) Because trees are often subcircuits of larger circuits, these results imply general performance limits due to propagation delay. The results give important information for the popular technique of pipelining.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Bentley, J.L. and Kung, H.T., A Tree Machine for Searching Problems, Proceedings of the International Conference on Parallel Processing (1979), 257-266.
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Brent, R.P. and Kung, H.T., On the Area of Binary Tree Layouts, Carnegie-Mellon University, 1979.
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Brent, R.P. and Kung, H.T., A Regular Layout for Parallel Adders, Technical Report CMU-CS-79-131, Carnegie-Mellon University, 1979.
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CITED BY 16
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Richard R. Koch , F. T. Leighton , Bruce M. Maggs , Satish B. Rao , Arnold L. Rosenberg , Eric J. Schwabe, Work-preserving emulations of fixed-connection networks, Journal of the ACM (JACM), v.44 n.1, p.104-147, Jan. 1997
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