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Finding euler circuits in logarithmic parallel time
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Source Annual ACM Symposium on Theory of Computing archive
Proceedings of the sixteenth annual ACM symposium on Theory of computing table of contents
Pages: 249 - 257  
Year of Publication: 1984
ISBN:0-89791-133-4
Authors
Sponsor
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 3,   Downloads (12 Months): 32,   Citation Count: 3
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ABSTRACT

A parallel algorithm for finding Euler circuits in graphs is presented. Its depth is log |E| and it employs |E| processors. The computational model considered is the PRAM (the shared memory model). This algorithm is a nice example of utilizing another parallel algorithm that does not seem to be closely related to our problem, namely the algorithm for finding the connected components and a spanning forest of an undirected graph.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
B. Awerbuch and Y. Shiloach, 'New Connectivity and MSF Algorithms for Ultracomputer and PRAM', Proc. of the 1983 International Conference on Parallel Processing, IEEE Computer Society Press, 175-179.
 
2
 
3
Y. Shiloach and U. Vishkin, 'An 0(log n) Parallel Connectivity Algorithm', Journal of Algorithms 3 (1982), 57-67.


Collaborative Colleagues:
B. Awerbuch: colleagues
A. Israeli: colleagues
Y. Shiloach: colleagues