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Tight bounds on the complexity of parallel sorting
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Source Annual ACM Symposium on Theory of Computing archive
Proceedings of the sixteenth annual ACM symposium on Theory of computing table of contents
Pages: 71 - 80  
Year of Publication: 1984
ISBN:0-89791-133-4
Author
Sponsor
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
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ACM  New York, NY, USA
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Downloads (6 Weeks): 7,   Downloads (12 Months): 60,   Citation Count: 17
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ABSTRACT

In this paper, we prove tight upper and lower bounds on the number or processors, information transfer, wire area and time needed to sort N numbers in a bounded-degree fixed-connection network. Our most important new results are: 1) the construction of an O(N))-node bounded-degree network capable of sorting N numbers in O(log N) word steps, 2) a proof that any network capable of sorting N(7 log N)-bit numbers in T bit-steps requires area A where AT2≥ &Ohgr;(N2log2N), and 3) the construction of a “small-constant-factor” bounded-degree network that sorts N &thgr;(log N)-bit numbers in T &equil; &thgr;(log N) bit steps with A &equil; &thgr;(N2) area.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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D. Angluin and C. Thompson, unpublished manuscript, 1982.
 
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K. Batcher, "Sorting Networks and their Applications", Proc. AFIPS Spring Joint Computer Conf., Vol. 32, 1968, pp 307-314.
 
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G. Bilardi and F. Preparata, "An Architecture for Bitonic Sorting with Optimal VLSI Performance", IEEE Transactions on Computers, to appear.
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G. Bilardi and F. Preparata, "The VLSI Optimality of the AKS Sorting Network," in preparation.
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A. El Gamal, personal communication, 1983.
 
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F. T. Leighton, "New Lower Bound Techniques for VLSI," Proc. 22nd Conf. on Foundations of Computer Science, 1981, pp. 1-12.
 
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F. T. Leighton, "Parallel Computation Using Meshes of Trees", Proc. 1983 Workshop on Graphtheoretic Concepts in Computer Science, Osnabruck West Germany.
 
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F. T. Leighton, "Simple o(log2N)-Depth Sorting Circuits", in preparation.
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D. S. Parker, "Notes on Shuffle/Exchange-Type Switching Networks", IEEE Transactions on Computers, Vol. C-29, No. 3, 1980, pp. 213-222.
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H. Stone, "Parallel Processing with the Perfect Shuffle", IEEE Transactions on Computers, Vol. C-20, No. 2, 1971.
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C. Thompson, "The VLSI Complexity of Sorting", IEEE Transactions on Computers, Vol. C-32, No. 12, 1983.
 
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CITED BY  17