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Resource allocation in rectangular SW banyans
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Source International Symposium on Computer Architecture archive
Proceedings of the 9th annual symposium on Computer Architecture table of contents
Austin, Texas, United States
Pages: 326 - 333  
Year of Publication: 1982
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Authors
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IEEE-CS : Computer Society
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 8,   Downloads (12 Months): 12,   Citation Count: 10
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ABSTRACT

This paper presents an algorithm for the formation of configurations connecting processors to memory and I/O devices on rectangular SW banyan networks with equivalent processor resources as the base nodes and equivalent memory and I/O resources as the apex nodes. Given a set of resource configuration requests, the algorithm always finds a partition of the network that meets the requests in space and time complexity linear with respect to the number of resources in the network.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Batcher, K.E., "The Flip Network in STARAN", Proc. Int'l Conf. on Parallel Processing, August 1976, pp. 65-71.
 
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3
Dennis, J.B., "The Varieties of Data Flow Computers", Proc. of 1st Int'l Conf. on Distributed Computing Systems, Oct 1979, pp. 430-439.
 
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5
 
6
Lang, T., and Stone, H., "A Shuffle Exchange Network with Simplified Control", IEEE Transactions on Computers, C-25, Jan 1976, pp.55-65.
 
7
Lipovski, G.J., and Tripathi, A., "A Reconfigurable Varistructured Array Processor", Proc. of the Int'l Conf. on Parallel Processing, Aug 1977, pp.165-174.
 
8
Lipovski, G.J., and Malek, M., "A Theory for Multicomputer Interconnection Networks", submitted for publication in IEEE Transactions on Computers.
 
9
Pease, M.C., "The Indirect Binary n-Cube Microprocessor Array", IEEE Transactions on Computers, Vol. C-26, May 1977, pp.458-478.
 
10
Premkumar, U.V., Kapur, R., Malek, M., Lipovski, G.J., and Horne, P., "Design and Implementation of the Banyan Network in TRAC", Proc. of the NCC, Vol. 49, May 1980, pp.643-653.
 
11
Premkumar, U.V., A Theoretical Basis for the Analysis and Partitioning of Regular SW Banyans, Ph.D. Thesis, University of Texas at Austin, Aug 1981.
 
12
Siegel, H.J., "Single Instruction Stream - Multiple Data Stream Machine Interconnection Network Design", Proc. of the Int'l Conf. on Parallel Processing, August 1976, pp.273-282.
 
13
Siegel, H.J., "A Model of SIMD Machines and a Comparison of Various Interconnection Networks", IEEE Transactions on Computers, Vol. C-28, No. 12, December 1979, pp.907-917.
 
14
Siegel, H.J., "The Theory Underlying the Partitioning of Permutation Networks", IEEE Transactions on Computers, Vol. C-29, No. 9, September 1980, pp.791-801.
 
15
Wittie, L.D., "Architectures for Large Networks of Microcomputers", Workshop on Interconnection Networks for Parallel and Distributed Processing, Apr 1980, pp.31.
 
16
Wu, C.L., and Feng, T.Y., "The Reverse-Exchange Interconnection Network", Proc. of the Int'l Conf on Parallel Processing, Aug 1979, pp.160-174.

CITED BY  10

Collaborative Colleagues:
U. V. Premkumar: colleagues
J. C. Browne: colleagues