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ABSTRACT

This paper presents the architecture of a parallel computer called a pyramid machine. The system consists of a pyramidal array of processing elements, each of which executes the instructions broadcast by a controller. Each processing element except those on the outside of the array is directly connected to thirteen neighboring elements: eight on the same level, four on the next finer level and one on the next coarser level. The architecture combines features of tree machines and features of mesh-connected parallel computers. As a result it is able to rapidly perform computations of local and global processing. The main areas of application are image processing, graphics and spatial problem solving. The motivation, basic structure, and applications of the system are discussed.

REFERENCES

• 1: Danielsson, P.-E. Getting the median faster. Computer Graphics and Image Processing, Vol. 17, No. 1, 1981, pp71-78.
• 2: Duff, M.J.B. CLIP4: A large scale integrated circuit array parallel processor Proceedings of the Third International Joint Conference on Pattern Recognition, Coronado, Calif 1976, pp728-733.
• 3: Dyer, C.R. A VLSI pyramid machine for hierarchical parallel image processing. Proceedings of PRIP '81: The IEEE Conference on Pattern Recognition and Image Processing, Dallas, Texas, August, 1981, pp381-386.
• 4: Gösta H. Granlund, The GOP Parallel Image Processor, Digital Image Processing Systems, p.200-227, January 1981
• 5: Hanson, A.R. and Riseman, E.M. Design of a semantically-directed vision processor. Technical Report, Dept. of Computer and Information Sciences, Univ. of Massachusetts, January, 1974.
• 6: Tanimoto, S.L. and Pavlidis, T. A hierarchical data structure for picture processing. Computer Graphics and Image Processing, Vol. 4, 1975, pp104-119.
• 7: Tanimoto, S.L. and Pfeiffer, J.J., Jr. An image processor based on an array of pipelines. Proceedings of the IEEE Workshop on Computer Architecture for Picture Analysis and Image Database Management, Hot Springs, Virginia, November, 1981.
• 8: Tanimoto, S.L. Algorithms for median filtering of images on a pyramid machine. Technical Report No. 83-01-04, Dept. of Computer Science, FR-35, Univ. of Washington, Seattle WA 98195, also to appear in Computing Structures for Image Processing, Duff, M.J.B., ed., Academic Press, London, 1983.
• 9: Uhr, L. Layered "recognition cone" networks that preprocess, classify and describe. IEEE Transactions on Computers, Vol. C-21, 1972, pp758-768.

INDEX TERMS

Primary Classification:
  I. Computing Methodologies
  I.3 COMPUTER GRAPHICS
      I.3.1 Hardware architecture
          Subjects: Parallel processing

Additional Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.2 Multiple Data Stream Architectures (Multiprocessors)
          Subjects: Single-instruction-stream, multiple-data-stream processors (SIMD)

General Terms:
Design, Theory