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ABSTRACT
The Multiplexed Information and Computing Service (Multics) of Project MAC at M.I.T. runs on a General Electric 645 computer system. The processors of this hardware system contain logic for both paging and segmentation of addressable memory. They directly accept two-part addresses of the form (segment number, word number) which they translate into absolute memory addresses through a series of indexed table lookups. To speed this address translation each processor contains a small, fast associative memory which remembers the most recently used address translation table entries. This paper reports the results of performance measurements on this associative memory. The measurements were made by attaching an electronic counter directly to a processor while Multics was in operation, and were taken for several associative memory sizes. The measurements show that for the observed load 16 associative registers are enough.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Corbat@, F.J., et al, "A New Remote-Accessed Man-Machine System", AFIPS Conference Proceedings 27 (1965 FJCC), Spartan Books, Washington, D.C., 1965, pp. 185-247.
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GE-645 Processor Reference Manual, Cambridge Information Systems Laboratory, General Electric Company, August, 1970.
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Shemer, J.E., and G.A. Shippey, "Statistical Analysis of Paged and Segmented Computer Systems", IEEE Transactions on Electronic Computers EC-15, 6 (December, 1966), pp. 855-863.
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CITED BY 12
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F. J. Corbató , J. H. Saltzer , C. T. Clingen, Multics: the first seven years, Proceedings of the November 16-18, 1971, fall joint computer conference, November 16-18, 1971, Las Vegas, Nevada
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