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ABSTRACT
This paper studies the problem of automatically selecting a suitable system architecture for implementing a real-time application. Given a library of hardware components, it is shown how an architecture can be synthesized with the goal of fulfilling the real-time constraints stated in the system's specification. In case the selected architecture contains several processing units, the specification is partitioned by assigning tasks to these. The use of three heuristic search techniques is investigated: genetic algorithms, simulated annealing, and tabu search; and it is described how these can be adapted to the architecture synthesis problem. It is concluded that tabu search is the most promising technique, but that simulated annealing is also applicable.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 8
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Martino Ruggiero , Alessio Guerri , Davide Bertozzi , Francesco Poletti , Michela Milano, Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Emiliano Dolif , Michele Lombardi , Martino Ruggiero , Michela Milano , Luca Benini, Communication-aware stochastic allocation and scheduling framework for conditional task graphs in multi-processor systems-on-chip, Proceedings of the 7th ACM & IEEE international conference on Embedded software, September 30-October 03, 2007, Salzburg, Austria
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